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STM32H743 has QSPI_IOs not in High Impedance Mode when Configured as Input

joelsa
Associate II

# STM32H743 has QSPI_IOs not in High Impedance Mode when Configured as Input

Hi Everyone,

I am trying to use the QUADSPI Block 2 on the STM32H743. The QUADSPI_BK2_IO0 to IO3 are connected to PE7 to PE10 ont LQFP-144 package (I am using the Nucleo-H743ZI2).

However, when I put the QUADSPI Peripheral into indirect read mode, the QUADSPI_BK2_IO0 Pin is not high impedance, and when shorted with a Digital Multimeter to 3V3, I measure about 100 to 200 mA of current.
In normal operation, this causes my slave device (which is an ADC) to drop it's logic level to about 1V, as it has an internal LDO an can only supply 10mA per pin with transients of up to 100 mA.

Why does the QUADSPI_BK2_IO0 not stay in High-Impedance-Mode, even though it is configured as an input?

My QUADSPI_CCR register is not 0x00000000, so 2.9.3 from the errata sheet is not an issue. It is however 0, except for three values: for DCYC which is 00010, so two dummy cycles, in order to apply workaround 2.9.2 from the errata sheet, for DMODE, which is 11, so four data lines, and FMODE, which is 01, so indirect read Mode.

IMODE, ADMODE, ABMODE etc. are 0, so the peripheral should not output anything and be read-only, and it is actually reading some data into the data register.

However, the inputs are not high-impedance, so the ADCs output level is below the logic level threshold, as the MCU is putting serious load on the ADC outputs. I checked the Nucleo-144 schematics and nothing weird is connected to those pins, and the same behaviour is observed when I disconnect everything from the Nucleo board to rule out any other source of error.

Does anybody have an idea why this is occuring?
1 ACCEPTED SOLUTION

Accepted Solutions
TDK
Guru

I think the QUADSPI just doesn't behave how you want it to. It's really misnamed, it's not just SPI but with 4 lines, it's really a specialized interface for QSPI flash.

Per the reference manual, if you're not actively sending clocks, all IO pins will be in output mode.

TDK_0-1694640648544.png

 

If you feel a post has answered your question, please click "Accept as Solution".

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6 REPLIES 6
TDK
Guru

Is the pin in AF mode (for QUADSPI), or input mode? Can you show the pin initialization?

If you feel a post has answered your question, please click "Accept as Solution".

Something seems seriously wrong or damaged. Perhaps you have a schematic so we can understand what you've fashioned?

Tips, buy me a coffee, or three.. PayPal Venmo Up vote any posts that you find helpful, it shows what's working..
joelsa
Associate II

The Pins are configured as Alternate Function Push-Pull for QUADSPI.

The behaviour occurs on a bare Nucleo-H743 board and also on a bare Nucleo-F767 board, all I do is configuring the QUADSPI with nothing connected and then short the pin which should be configured as an input to 3V3 with a multimeter.

TDK
Guru

I think the QUADSPI just doesn't behave how you want it to. It's really misnamed, it's not just SPI but with 4 lines, it's really a specialized interface for QSPI flash.

Per the reference manual, if you're not actively sending clocks, all IO pins will be in output mode.

TDK_0-1694640648544.png

 

If you feel a post has answered your question, please click "Accept as Solution".
joelsa
Associate II

I agree with the first part, and probably can't (ab)use QuadSPI in the way I want to.

For the RM part (page 884, section 23.3.4, in RM0433 Rev 8 for all future readers), I did not read that part the way you do. The wording doesn't explicitly state what exactly constitutes "all other cases", because I read it as "all other phase cases". This would also include Dummy Cycles, but I think the pins switch to input already during dummy cycles. But your reading certainly matches the behaviour I observe, so thanks for the hint!