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STLink: How to hold target under reset?

Posted on February 22, 2017 at 15:16

How can I *hold* target connected to STLink under reset, either using CLI or GUI version of STLinkUtility, or any other software tool?

ST: If there's no provision for this in STLink Utility, then please consider this as a feature request.

Thanks,

Jan Waclawek

6 REPLIES 6
Nesrine M_O
Lead II
Posted on February 22, 2017 at 16:32

Hi

Waclawek.Jan

,

The “connect under reset�? option is available with ST-LINK/V2, it

allows to connect to the target before executing any instruction:

  • STM32 ST-LINK utility

    GUI version

0690X00000606NjQAI.png

  • STM32 ST-LINK utility command line interface (CLI)

    :

    [UR]: Connect to the target under reset

    .

It seems this is not what you are looking for, so:

  1. Could you please precise the purpose of such request?
  2. what kind of application case leads to this request?

-Nesrine-

Posted on February 22, 2017 at 17:31

Nesrine,

Thanks for your reply.

I am aware of the 'Connect Under Reset option'. This is not what I am looking for - when used, NRST output of STLink goes down during the connection phase, but the the debugger puts the core into halt and releases the NRST line, so the resulting behaviour is a short pulse.

Simply put, I'd like to have a tickbox (or command for CLI) which directly sets and/or releases the NRST output of STLink.

Rationale:

In larger systems, the mcu reset is connected to reset inputs of other chips. During debugging, sometimes it is needed to hold the whole system in reset. Once this line is connected to STLink, it would be an added bonus if it could be directly manipulated from PC.

Thanks.

Jan

Posted on February 27, 2017 at 11:15

Hi

Waclawek.Jan

,

I forward your request to our team,I will come back when i have more information.

Thank you very much for your contribution to the enhancement of our STM32 related solutions.

-Nesrine-

Paul Wearne
Associate
Posted on March 14, 2017 at 23:04

I would like to use the ST-Link Utility CLI, as part of my high-level software test environment. I would like the ability to hold the microprocessor in reset, while the high level test test environment is setup to stimulate and monitor the software build under test.

Posted on June 02, 2017 at 10:45

Nesrine,

Any news on this one?

Thanks,

Jan

Posted on June 05, 2017 at 10:26

Hi

Waclawek.Jan

,

Sorry for the delay

Indeed, your

proposal is

interesting

for many use cases. We will consider it for future release

s

of ST-LINK Utility

.

-Nesrine-