Hello, after reading the data sheet, it's not clear to me if one can synchronize the RHRPMPOL01 to an FPGA pin. Basically the behaviour in slave mode is not described when no sync clock is present (which would be the case on initial power on). In an ideal world it would default to its internal 500khz to get going so that the FPGA can receive power, configure itself and then start driving the pin. Synchronization like this is important in low noise readout systems. It means that any switching artifacts can occur exactly when you expect them to.
