BlueNRG-1 how to configure system clock to 16 MHz?

[Michael Krechko]

There is a problem with ADC in BlueNRG-1 described in ERRATA (https://www.st.com/content/ccc/resource/technical/document/errata_sheet/group0/ba/1e/6f/42/96/20/4f/0d/DM00544604/files/DM00544604.pdf/jcr:content/translations/en.DM00544604.pdf - 1.6 ) so I'm trying to use "Workaround: the application, using a 32 MHz quartz and accessing ADC, should configure system clock to 16 MHz." but there is no any registers to divide 32 MHz to 16 MHz in library files and docs by ST. I work with BLE module SPBTLE-1S by ST with 32MHz quartz inside so I can't change it.

[Winfred LU]

Hi Michael,

If you are using BlueNRG-1 DK 3.0.0, please define "ADC_2411".

For IAR users, please define it in: Project | Options | C/C++ Compiler | Preprocessor | Define symbols

Please refer to BlueNRG1_adc.c about the implementation.

Check all ADC_Functions:

before trying to access ADC resources, it sets APB bus to 16 MHz with "ADC_2411_WORKAROUND(1);",

and after accessing ADC resources it sets APB bus back to 32 MHz with "ADC_2411_WORKAROUND(0);".

Such as ADC_DeInit()

void ADC_DeInit(void)
{
  ADC_2411_WORKAROUND(1);
  
  /* Enable ADC reset state */
  ADC->CTRL_b.RESET = SET;
 
  ADC_2411_WORKAROUND(0);
}

----

If you are using BlueNRG-2 DK 3.1.0, please define "FORCE_CORE_TO_16MHZ".

It just simply forces the APB bus to 16 MHz.

The implementation is in system_bluenrg1.c line 937.

AHBUPCONV->COMMAND = 0x15;

Best Regards,

Winfred

[Michael Krechko]

Thank you very much! It is strange that there is no detailed information in DS about some registers like AHBUPCONV

[Winfred LU]

I agree that DS shall include more register details.

Will forward the request internally.