What is "Fast Mode" of a GPIO Output and why do only some pins have it?

[CKugl.1]

STM32CubeIDE Version: 1.6.1 Build: 9958_20210326_1446 (UTC) (C) 2021 STMicroelectronics ALL RIGHTS RESERVED

Device: NUCLEO-L412KB

In Device Configuration Tool, Pinout & Configuration, GPIO Mode and Configuration, for a GPIO Output, what is the meaning of the "Fast Mode" field, and how is that related to "Maximum output speed"? Why is it n/a for port A pins but available to Enable/Disable for port B pins?

[waclawek.jan]

This is probably to switch on the I2C Fm+ capability, see SYSCFG_CFGR1.I2C_PBx_FMP.

Not that that one is explained properly in RM and DS, but unless you intend to use I2C in Fm+ mode, you can leave it at its reset default value safely.

JW

[TDK]

It is used to enable fast mode for I2C on a per-pin basis by calling HAL_I2CEx_EnableFastModePlus.

The source code actually explains why it's only available on particular pins decently well.

/**
 * @brief Enable the I2C fast mode plus driving capability.
 * @param ConfigFastModePlus Selects the pin.
 * This parameter can be one of the @ref I2CEx_FastModePlus values
 * @note For I2C1, fast mode plus driving capability can be enabled on all selected
 * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
 * on each one of the following pins PB6, PB7, PB8 and PB9.
 * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
 * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
 * @note For all I2C2 pins fast mode plus driving capability can be enabled
 * only by using I2C_FASTMODEPLUS_I2C2 parameter.
 * @note For all I2C3 pins fast mode plus driving capability can be enabled
 * only by using I2C_FASTMODEPLUS_I2C3 parameter.
 * @note For all I2C4 pins fast mode plus driving capability can be enabled
 * only by using I2C_FASTMODEPLUS_I2C4 parameter.
 * @retval None
 */
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
{
 /* Check the parameter */
 assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
 
 /* Enable SYSCFG clock */
 __HAL_RCC_SYSCFG_CLK_ENABLE();
 
 /* Enable fast mode plus driving capability for selected pin */
 SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
}

[waclawek.jan]

First, CubeMX ought to hint that this is I2C/Fm+ specific feature.

Second, a random "library" is not the place for documentation. RM/DS/AN are.

Third, RM nor DS explains, what *exactly* is enabled by SYSCFG_CFGR1.I2C_PBx_FMP and SYSCFG_CFGR1.I2Cx_FMP bits. Per I2C specification, difference between Fm+ and Fm is only in the drive capability (plus receiver timing tolerance for backward compatibility, but that is unrelated to pins). DS specifies FT_f pins to sink 20mA unconditionally. So what gives.

Fourth, RM fails to explain, whether the feature enabled - whatever it is - is related to pin structure as such, or is I2C specific. In other words, it ought to explain, whether that feature is or is not subject to given pin being set as AF in GPIO_MODER and set to the given I2C's AF in GPIO_AFR.

Fifth, RM fails to explain, what exactly is affected by SYSCFG_CFGR1.I2Cx_FMP bits bits (pins affected by individual bits ought to be listed there).

#documentation_first

#Documentation

JW