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hamrgh
Associate II
September 27, 2016
Question

use LAN8720a for PHY (init ethernet)

  • September 27, 2016
  • 11 replies
  • 7244 views
Posted on September 27, 2016 at 11:50

hi 

I working with stm 32 f 429 with cubemx (to init ethernet)

in cubemx PHY is DP83848 but i using LAN8720a

What changes should be in Keil (FOR Lan8720a) ?

any body know?

There is contents dispersed in some page in this forum but incomplete 

Does anyone have sample code with LAN8720a & HAL driver?

#cubemx #stm32f4 #ethernet #lwip
This topic has been closed for replies.

11 replies

hamrgh
hamrghAuthor
Associate II
October 1, 2016
Posted on October 01, 2016 at 20:38

No Body is not here ???????????!!!!!!!!!!!!!!!

Tesla DeLorean
Guru
October 1, 2016
Posted on October 02, 2016 at 01:02

Very few people here providing answers, even fewer using HAL.

I would suggest you review implementation for the

https://www.element14.com/community/community/designcenter/stm32f4-discovery-expansion-boards

breakout board which uses the LAN8720 in RMII mode. I'd pay particular attention to the PHY_ADDR.

You could look for other STM32 based boards using the chip also.

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islab dna
Visitor II
May 30, 2017
Posted on May 30, 2017 at 08:26

Were you able to get this to work? If so, I would appreciate your help as I am trying the same thing with STM32F407VG using the HAL library but no luck. 

ss infod
Visitor II
July 31, 2017
andy b
Senior
July 31, 2017
Posted on July 31, 2017 at 18:51

Hi

I have made stm32f4 discovery + LAN8720 PHY work with no problems (also using HAL) if any of you still have questions. Fire away! I will try to help you as much as I can.

Have a nice day

-Andy
Alexandre Reis
Visitor II
September 11, 2017
Posted on September 11, 2017 at 21:57

Hi Andy, how are you?

Which board did you used? STM32F429-DISC1? I'm reading a lot to solve my problem and every site that was talking about this board, I must to do some rework in the board. I'm already loosing my mind (lol). If you're using this board, can you help me to get my project run?

I really appreciate your support!

Greetings,

Alex

Mark Shoe
Associate III
September 18, 2017
Posted on September 18, 2017 at 14:19

Had the same problem. It was the reset line to the LAN8720 you need to set it in the low_level_init and not after the MX_LWIP_Init in main. So bring the chip out of reset before doing the init.

anase
Visitor II
August 11, 2019

you can use this phy settings in your stm32f4xx_hal_conf.h (RMII Config Tested FIne)

/* ################## Ethernet peripheral configuration ##################### */

/* Section 1 : Ethernet peripheral configuration */

/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */

#define MAC_ADDR0  2U

#define MAC_ADDR1  0U

#define MAC_ADDR2  0U

#define MAC_ADDR3  0U

#define MAC_ADDR4  0U

#define MAC_ADDR5  0U

/* Definition of the Ethernet driver buffers size and count */  

#define ETH_RX_BUF_SIZE        ETH_MAX_PACKET_SIZE /* buffer size for receive        */

#define ETH_TX_BUF_SIZE        ETH_MAX_PACKET_SIZE /* buffer size for transmit       */

#define ETH_RXBUFNB          ((uint32_t)4U)    /* 4 Rx buffers of size ETH_RX_BUF_SIZE */

#define ETH_TXBUFNB          ((uint32_t)4U)    /* 4 Tx buffers of size ETH_TX_BUF_SIZE */

/* Section 2: PHY configuration section */

/* LAN8742A_PHY_ADDRESS Address*/ 

#define LAN8742A_PHY_ADDRESS      0U

/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 

#define PHY_RESET_DELAY         ((uint32_t)0x000000FFU)

/* PHY Configuration delay */

#define PHY_CONFIG_DELAY        ((uint32_t)0x00000FFFU)

#define PHY_READ_TO           ((uint32_t)0x0000FFFFU)

#define PHY_WRITE_TO          ((uint32_t)0x0000FFFFU)

/* Section 3: Common PHY Registers */

#define PHY_BCR             ((uint16_t)0x00U)  /*!< Transceiver Basic Control Register  */

#define PHY_BSR             ((uint16_t)0x01U)  /*!< Transceiver Basic Status Register  */

#define PHY_RESET            ((uint16_t)0x8000U) /*!< PHY Reset */

#define PHY_LOOPBACK          ((uint16_t)0x4000U) /*!< Select loop-back mode */

#define PHY_FULLDUPLEX_100M       ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */

#define PHY_HALFDUPLEX_100M       ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */

#define PHY_FULLDUPLEX_10M       ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */

#define PHY_HALFDUPLEX_10M       ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */

#define PHY_AUTONEGOTIATION       ((uint16_t)0x1000U) /*!< Enable auto-negotiation function   */

#define PHY_RESTART_AUTONEGOTIATION   ((uint16_t)0x0200U) /*!< Restart auto-negotiation function  */

#define PHY_POWERDOWN          ((uint16_t)0x0800U) /*!< Select the power down mode      */

#define PHY_ISOLATE           ((uint16_t)0x0400U) /*!< Isolate PHY from MII         */

#define PHY_AUTONEGO_COMPLETE      ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed  */

#define PHY_LINKED_STATUS        ((uint16_t)0x0004U) /*!< Valid link established        */

#define PHY_JABBER_DETECTION      ((uint16_t)0x0002U) /*!< Jabber condition detected      */

  

/* Section 4: Extended PHY Registers */

#define PHY_SR             ((uint16_t)0x10U)  /*!< PHY status register Offset           */

#define PHY_SPEED_STATUS        ((uint16_t)0x0002U) /*!< PHY Speed mask                 */

#define PHY_DUPLEX_STATUS        ((uint16_t)0x0004U) /*!< PHY Duplex mask                 */

#define PHY_ISFR            ((uint16_t)0x000BU)  /*!< PHY Interrupt Source Flag register Offset  */

#define PHY_ISFR_INT4          ((uint16_t)0x000BU) /*!< PHY Link down inturrupt    */ 

it's work fine for me

S_1
Associate II
July 26, 2020

The default PHY addr value will be 0. Change the PHY addr value to 0 for LAN8720A. This works for me.