STM32H750VBT6 ADC 10bit 12bit

[mohammadsdtmnd]

I’ve configured dual channel simultaneous with overrun overwritten and DMA. I’ve connected ECN 1313 incremental signals directly to MCU differential adc. 10ksps, 64.5 ADC sample time, 50MHz ADC clock. The noise on 12bit sampling is more than expected comparing to 10bit. Or in other word noise in 10bit is less than expected compared to 12 14 16!!!

12 bit capture

10bit data capture, as you can see in 12 bit capture red and green dots suggest there should be at least 8 code level

It seems I have more noise than expected in 12 bit data capture, doesn’t it? Also I have attached .ioc. and there the only parameter i am changing manually is the bit depth in main.c manually is “hadc1.Init.Resolution =”.

And here is my statistic calculation:

statistics

I think there is something wrong with the hardware! Because 12 bit reading is consistent with 14 and 16 bit depth. It means hardware have more noise on sampling 12 14 16 bit and it seems odd! I havev also checked errata and there was only told if you have ADC_OVR_DATA_OVERWRITTEN;, there would be no problem on DMA and simultaneous dual mode.

[mohammadsdtmnd]

Initialize sequence in main.c

 

  // 3. Calibrate and Start Dual ADC MultiMode DMA
  HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_DIFFERENTIAL_ENDED);
  HAL_ADCEx_Calibration_Start(&hadc2, ADC_CALIB_OFFSET, ADC_DIFFERENTIAL_ENDED);

  /* Start the timer that will trigger the ADC */
  if (HAL_TIM_Base_Start(&htim6) != HAL_OK)
  {
      Error_Handler();
  }

  if (HAL_ADCEx_MultiModeStart_DMA(&hadc1, (uint32_t*)g_adc_dma_buffer, 1) != HAL_OK)
  {
      Error_Handler();
  }

 

[MasterT]

How exactly connection to adc inputs is done? SAR adc demands cap across inputs as close as possible to IC.

Check out my hardware setup for nucleo-H7 adc tests 

[mohammadsdtmnd]

Thank you so much. But I’m just curious what is your reference for “then SAR input requires CAP”. Since STM32H7 datasheet doesn’t suggest to add any cap it just suggested input series resistor!
Also I’m curious why ST does not told us about input diff/signle ended wiring on its input! So imprecise :( Sadness for precise analog engineer guy, doesnt it?

[MasterT]

You are misunderstanding meaning of the data sheets, it’s just product specification. Additional information can be found in application notes, like 

AN2834
Application note
How to get the best ADC accuracy
in STM32 microcontrollers

There are more, from ST or others big players in industry. 

[TDK]

423*4 != 1740. It’s close, but it’s not the same, so something else is different in the test setup here.

Differential signals should have a common mode of VREF/2. These don’t have that. The incremental signals here are two single ended signals.

 

[mohammadsdtmnd]

The common mode is about 2.5V but the the amplitude of tatal differential signal is maximum 1.2v. it means the maximum voltage will be 3V and This should be acceptable by the ADC, as we can see the 10bit performs the best!