Skip to main content
VKast.2
Associate
November 2, 2021
Question

STM32H743ZI SPI Clock enhancement options

  • November 2, 2021
  • 6 replies
  • 1406 views

Hi ST Support,

I have an STM32H743ZI and use SPI4 for the SPI communication.

I have generated the Project from the Cube MX and configured an SPI clock of 50Mhz, But on the Logic analyzer captures, I can see only the clock of 25Mhz. We are trying to interface with some Slaves where STM32H743ZI is a DMA Master.

It would be great if we get some code that can show us a Clock frequency of 50Mhz on the Logic analyzer.

I am attaching the Cube MX file for reference.

This topic has been closed for replies.

6 replies

Mike_ST
ST Technical Moderator
November 2, 2021

Hello,

Please try PLL3Q as SPI4 input source clock, and configure:

DIVM3 : /3

DIVN3 : x96

DIVQ3 : /8

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. 
VKast.2
VKast.2Author
Associate
November 2, 2021

Hello Mike,

If the above configurations are done, I am observing a SPI4 clock of 257Mhz with clock errors. But I need only 50Mhz for SPI4 and must see the same on the Logic analyzer.

What must be the input frequency?

If needed you can share me the ioc file with clock config

Mike_ST
ST Technical Moderator
November 2, 2021

The settings I gave you are derived from the .ioc you attached to this thread.

25 MHz XTAL, and HSE as input for the PLLs.

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. 
TDK
November 2, 2021

Is this a custom board? Most ST boards have an 8 MHz HSE clock source, not 25 MHz. Perhaps that's what is wrong, although it doesn't fully explain this:

> An SPI clock of 257 MHz

"If you feel a post has answered your question, please click ""Accept as Solution""."
VKast.2
VKast.2Author
Associate
November 8, 2021

Hi,

For the settings that were suggested, It shows a SPI4 clock of 100Mhz. I need it to be 50Mhz and the same to be seen on the Logic analyzer.

TDK
November 8, 2021

So increase the prescaler by a factor of 2.

"If you feel a post has answered your question, please click ""Accept as Solution""."