STM32CubeMX configuration limitation (greyed out options)

[RMatv]

Hello, friends!

I configured the project for STM32L011 Nucleo board for read ADC input and I noticed that some of frequency devider options were greyed out for some reason).

However I tried to change this setting in the c file with 100% success:

At least the code worked perfectly as was expected.

So the question is: why Cube greyed out this options while being applicable? Is there any method to get the information on why option is grey?

[Khouloud ZEMMELI]

​Hello @Community member​ 

Thank you for the feedback , this is reported internally for further check.

Best Regards,

Khouloud.

[waclawek.jan]

Wouldn't that result in ADC clock frequency below of the minimum given by datasheet?

JW

[RMatv]

Could you make clear what kind of miminum frequency you are talking about? I see this in the datasheet: "When selecting an analog ADC clock frequency lower than 3.5 MHz, it is mandatory to first enable the Low Frequency Mode by setting bit LFMEN=1 into the ADC_CCR register".

So I switched the "Low frequency mode" parameter to "Enable". I suppose that that is it?

[Khouloud ZEMMELI]

​Hello @Community member​ 

According to our development team , the asynchronous clock mode divided by x should respect the Fadc min, max constraint :

the Fadc min, max constraint is :

according to an RCC Parameter: Power Regulator voltage Scale 1 or 2 or 3 we define a max and min Fadc constraint.

the asynchronous/synchronous clock mode divided by x can be selected only if :

Fadc min < ADCClockSynch/x < Fadc max & Fadc min < ADCClockASynch/x < Fadc max.

for example in our case we use STM32L0

-the ADCClockSynch =16 MHz & ADCClockASynch = 2.097 MHZ

- the power Regulator Voltage Scale is set to power Regulator Voltage Scale 1 => that give us a Fadc min = 140 KHz and Fadc max = 16 MHz

we take the example of asynchronous clock mode divided by 4 and the asynchronous clock mode divided by 256

1/

16Mhz / 4 = 4 MHz Fadc min= 140 KHz < 4Mhz< fadc max = 16 Mhz then the asynchronous clock mode divided by 4 can be used .

2/

16 MHz /256 = 62.5 KHz < Fadc min = 140 KHz then asynchronous clock mode divided by 256 not allowed .

that why the not allowed divider are grayed in Mx.

in the c file, the code worked perfectly because all divider are declared and can be used without any problem.

Best Regards,

Khouloud.