SPI speed limited to 40 MHz on STM32L4R5Zi?

[JayDev]

Hello! I was looking at the datasheet for the STM32L4R5ZI chip and it shows the limitation of the SPI (for the 2.7V to 3.6V range). I set this in the *.ioc file and tried to select a prescaler of 2 on a 120 MHz block to get a frequency of 60 MHz. Unfortunately, it seems to be limiting me to 40 MHz and I'm not entirely sure why that is.

I'm not sure if this is a software limitation/bug or if I'm missing something obvious. Any idea why it might be limiting me to 40 MHz rather than 60?

Any help you can give me would be appreciated. Thanks!

[Tesla DeLorean]

Stop relying on the software being correct.

Mechanically the SPI will clock up to 60 MHz, what the signal integrity looks like at that rate, that's another matter. You'd want DMA to do the servicing.

What is the end goal here?

For SDCARD/EMMC the SDIO/SDMMC peripheral is more efficient.

[JayDev]

I have a project currently implemented on another chip that doesn't have SDMMC support and was looking to see if this is a viable alternative. It's currently configured using SPI and limited to 32 Mbps (due to the clock limitation of 64 MHz). This chip is 120 MHz so I was anticipating reaching 60 Mbps (which seems to be supported according to the datasheet. I'm not currently looking at SDMMC because we're hoping it will be a relatively simple port over (both software and hardware wise), so that's why we're looking at SPI for the SD card writes rather than SDMMC.

I was just surprised to see the warning and wanted to make sure I wasn't missing something. I don't expect software to be perfect but with lengthy datasheets, it IS possible that I can overlook something, hence this post to make sure I'm not missing something that would explain this warning.