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MShao.1
Associate III
May 25, 2021
Question

SDIO,SD1bit,UART4 Disable.

  • May 25, 2021
  • 10 replies
  • 2227 views

​

I want to use uart4_tx and sdio at the same time.

But, in cubemx(6.2.1),

SDIO->Mode: SD 1 bit

UART4->Mode: only Disable.

​

This topic has been closed for replies.

10 replies

TDK
May 25, 2021

If pins are shared between peripherals, and there are no alternatives, you cannot use them at the same time. Larger chips typically have more options.

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Tesla DeLorean
Guru
May 25, 2021

Fails to mention part, package, or any actionable details.

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TDK
May 25, 2021

And yet still includes more info than some other people.

It would be nice if questions were more curated. TI MSP430 forums get better questions, IMO.

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Khouloud OTHMAN
Associate
May 25, 2021

Hello @MShao.1​,

First le me welcome you to the STM32 Community :smiling_face_with_smiling_eyes:

Could you please share your .ioc file to check from our side or at least precise which MCU are you using ?

It will be helpful to find faster the root cause of the problem if it exists.

Thanks in advance,

Khouloud.

MShao.1
MShao.1Author
Associate III
May 26, 2021

MCU:STM32F103RCT6 LQFP64.

Attachment is the ico file.

​

​

TDK
May 26, 2021

The STM32F1 family assigns pins on a per-peripheral basis rather than per-pin. Less ancient families do this on a per pin basis. So even though you aren't using SDIO_D2, it shares its functionality with UART4 and you can only have one enabled per the datasheet.

0693W00000APncTQAT.png 

0693W00000APncYQAT.png

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MShao.1
MShao.1Author
Associate III
May 26, 2021

Now the problem is, even if I use the "HAL_SD_DeInit" function to turn off the SDIO clock, and then execute the uart4 initialization function, but uart4_ TX is still unable to send data.

		ret = HAL_SD_DeInit(&hsd);
//		RCC->AHBENR &= ~(1<<10);
//		SDIO->DCTRL &= ~(3<<10);
		osDelay(1000);
		uart4_init(36,250000);
		osDelay(1000);
		while((UART4->SR&0x40)==0);
		UART4->DR = 0x5A;

TDK
May 26, 2021

Is the pin initialized in the correct AF mode? Show the relevant registers.

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