Parameter selection grey out causing ADC performance loss on stm32f429 discovery board.

[MLiva]

I am trying this ADC configuration created by STM32CubeMX

'''''''''''''''''''''''''''''''''''

static void MX_ADC1_Init(void)

{

 /* USER CODE BEGIN ADC1_Init 0 */

 /* USER CODE END ADC1_Init 0 */

 ADC_ChannelConfTypeDef sConfig = {0};

 /* USER CODE BEGIN ADC1_Init 1 */

 /* USER CODE END ADC1_Init 1 */

 /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) 

 */

 hadc1.Instance = ADC1;

 hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;

 hadc1.Init.Resolution = ADC_RESOLUTION_12B;

 hadc1.Init.ScanConvMode = DISABLE;

 hadc1.Init.ContinuousConvMode = DISABLE;

 hadc1.Init.DiscontinuousConvMode = DISABLE;

 hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;

 hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T2_TRGO;

 hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;

 hadc1.Init.NbrOfConversion = 1;

 hadc1.Init.DMAContinuousRequests = ENABLE;

 hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;

 if (HAL_ADC_Init(&hadc1) != HAL_OK)

 {

  Error_Handler();

 }

 /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. 

 */

 sConfig.Channel = ADC_CHANNEL_0;

 sConfig.Rank = 1;

 sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

  Error_Handler();

 }

 /* USER CODE BEGIN ADC1_Init 2 */

 /* USER CODE END ADC1_Init 2 */

}

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Parameter

ADC_CLOCK_SYNC_PCLK_DIV2

is grey out in CubeMX and cannot be selected. Only

ADC_CLOCK_SYNC_PCLK_DIV4 and above can be selected.

The effect of this is that I only get 1.4Ms/s conversion if I use this.

If I use ADC_CLOCK_SYNC_PCLK_DIV2 then I can get 2.8Ms/s conversion.

I am clocking the board at 168MHz.

My question is this a problem with CubeMX and if not what can be done to achieve the higher ADC conversion without hacking the code generated by CubeMX

[MLiva]

I had a look at the data sheet and I think I found the answer.

According to the datasheet ADC maximum clock is typ 30MHz and max 36MHz.

My ARB2 clock is 84MHz which when divided by ADC_CLOCK_SYNC_PCLK_DIV2 will generate a 42MHz ADC clock which is more then 30 MHz, hence CubeMX is correct to only allow ADC_CLOCK_SYNC_PCLK_DIV4 or more.

I guess I am overclocking in my code, the ADC seem to accept 42MHz as the results are OK.

[waclawek.jan]

> I guess I am overclocking in my code, the ADC seem to accept 42MHz as the results are OK.

As with any overclocking, it may "work". The DS gives you the guaranteed values - if you overclock, it may fail unexpectedly under various conditions.

The best story I have for this was, when on a local forum somebody complained that his AVR program works perfectly except unexpected failure in one particular function. I worked him through some exercises which narrowed down the failure to an address which was on a 0x1000 boundary; only after further extensive querying he admitted he is overclocking the mcu by some 50%...

JW

[MLiva]

I dropped the main clock from 168MHz to 144MHz and now I can choose ADC_CLOCK_SYNC_PCLK_DIV2 in CubeMX which now generates ADC clock speed of 36MHz. I can now push the ADC to sample at 2.4Ms/s as per DS.