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GS1
Senior III
Mar 31, 2022 5:30 PM UTC
Solved

Missing entry for OctoSPI in PeriphClockSelection in PeriphCommonClock_Config for STM32H7A3

In CubeMX 6.5.0. I detected a missing clock specification for OctoSPI:

void PeriphCommonClock_Config(void)

{

 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

 /** Initializes the peripherals clock

 */

 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_SPI3

                             |RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_SPI1

                             |RCC_PERIPHCLK_UART8|RCC_PERIPHCLK_FDCAN

                             |RCC_PERIPHCLK_USART6|RCC_PERIPHCLK_UART7

                             |RCC_PERIPHCLK_UART4|RCC_PERIPHCLK_USART3

| RCC_PERIPHCLK_OSPI; // <<< is missing !!!

 PeriphClkInitStruct.PLL2.PLL2M = 4;

 PeriphClkInitStruct.PLL2.PLL2N = 200;

 PeriphClkInitStruct.PLL2.PLL2P = 10;

 PeriphClkInitStruct.PLL2.PLL2Q = 5;

 PeriphClkInitStruct.PLL2.PLL2R = 4;

 PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_1;

 PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;

 PeriphClkInitStruct.PLL2.PLL2FRACN = 0;

 PeriphClkInitStruct.PLL3.PLL3M = 2;

 PeriphClkInitStruct.PLL3.PLL3N = 100;

 PeriphClkInitStruct.PLL3.PLL3P = 2;

 PeriphClkInitStruct.PLL3.PLL3Q = 2;

 PeriphClkInitStruct.PLL3.PLL3R = 2;

 PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_2;

 PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;

 PeriphClkInitStruct.PLL3.PLL3FRACN = 0;

 PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_PLL2;

 PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL3;

 PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL2;

 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL3;

 PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_PLL3;

 PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;

 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)

 {

   Error_Handler();

 }

}

Please correct in next release of CubeMX.

BR GS

This topic has been closed for replies.
Mike_ST
Mike_STBest answer
ST Technical Moderator
Apr 1, 2022 10:34 AM UTC

Thank you very much for your input,

From our database, I think the issue has been already spotted, and a fix expected for 6.6.0.

Anyways, I entered a ticket, and hopefully the fix will be validated against your input as well.

Again thank you.

#125631

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. 

3 replies

Mike_ST
ST Technical Moderator
Apr 1, 2022 9:32 AM UTC

Hello,

Thank you for reporting that,

Could you share an ioc file that highlights the issue ?

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. 
GS1
GS1Author
Senior III
Apr 1, 2022 9:50 AM UTC

Hello Mike,

please see attached the IOC where the clock reference is missing. Clocksource is selected to PLL2R for OCTOSPI.

On the other hand:

In case I change the clocksource to PLL1Q, the clock initialisation is included in the OctoSPI initialisation and is done correctly. But it then no longer appears in the PeriphCommonClock_Config.

BR GS

Mike_ST
Mike_STBest answer
ST Technical Moderator
Apr 1, 2022 10:34 AM UTC

Thank you very much for your input,

From our database, I think the issue has been already spotted, and a fix expected for 6.6.0.

Anyways, I entered a ticket, and hopefully the fix will be validated against your input as well.

Again thank you.

#125631

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question.