LevelX problem with OctoSPI in QuadSPI mode

[Scotty55]

Our board contains a STM32H523 and a W25Q256JV connected to OctoSPI1 configured for Quad SPI mode. FileX/LevelX should handle the external memory.

LevelX OSPI Component is configured for “Custom”. After generating the code with CubeMX (6.18.1), Filex/Target/lx_stm32_ospi_driver_glue.c contains several functions with wrong code, e.g:

 

INT lx_stm32_ospi_get_status(UINT instance) {

…

/* Initialize the read status register command */

s_command.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;

s_command.IOSelect = HAL_XSPI_SELECT_IO_7_0;

s_command.Instruction = LX_STM32_OSPI_OCTAL_READ_STATUS_REG_CMD;

s_command.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;

s_command.InstructionWidth = HAL_XSPI_INSTRUCTION_16_BITS;

s_command.Address = 0;

s_command.AddressMode = HAL_XSPI_ADDRESS_8_LINES;

s_command.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;

s_command.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;

s_command.DataMode = HAL_XSPI_DATA_8_LINES;

s_command.DataLength = 2;

s_command.DummyCycles = LX_STM32_OSPI_DUMMY_CYCLES_READ_OCTAL;

s_command.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;

/* DTR mode is enabled */

s_command.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_ENABLE;

s_command.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;

s_command.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;

s_command.DQSMode = HAL_XSPI_DQS_ENABLE;

…

}

W25Q256JV works with IO 3..0, 4 Lines, Instruction 8 Bits, DTR disabled and so on.

What is going on here? Did I miss something? Where can I find a working example for a similar configuration?

 

[Ming qiming]

The generated command looks like an Octal DDR profile, not a W25Q256JV Quad SPI profile: 8-line instruction/address/data, 16-bit instruction width, DTR and DQS enabled. I would first verify the custom LevelX component mapping and test the same flash with a small HAL XSPI command before involving FileX/LevelX. For Quad SPI, the instruction is normally 8-bit, data/address use 4 lines, and DTR/DQS should be disabled. Also check the flash address mode: W25Q256JV needs the address width and 3-/4-byte mode to agree. If the standalone HAL test works but CubeMX keeps generating the Octal settings, this looks more like a component/template or CubeMX package issue than a LevelX problem.