Is it possible to change CPU frequency during runtime on STM32F767VGT6 MCU?

[AShar.9]

I have a project which uses STM32F767VGT6 MCU. I have the basic initialisation done through CubeMX and it runs on 40MHz frequency. During runtime, I would like to increase or decrease this CPU frequency. Is it possible to do so, and if yes can you please guide me on how to do this?

Thanks

[Danish1]

It certainly is possible. But I think CubeMX will get in the way because it is only designed to support a single frequency.

How to do this.

Fundamentals:

At higher speeds, stm32 uses a Phase-Locked-Loop (PLL) to multiply a reference frequency by a number to get your wanted frequency. You want to change that number to get a different frequency. During such a change, the output of the PLL might go too high for the cpu to cope with, so ST do not allow you to change the number while the cpu uses the PLL as its clock source.

Anything that gets its clock from the PLL (e.g. USARTs, PWM) will be unpredictable, probably unusable, during the change

So you will have to

1. switch to a different clock source (HSI or HSE)
2. turn PLL off, change multiplier number, turn PLL back on
3. Adjust wait-states of FLASH to suit your new frequency
4. wait for PLL to lock
5. switch to PLL clock source
6. Recalculate baud rates

All this is explained in the Reference Manual for your stm32. But (by using CubeMX) you are at a disadvantage because you don't know what other CubeMX things you also have to set up to allow it to re-calculate e.g. baud rates for USARTs.

Edit:

Because this is difficult, you should consider why you want to do this. (You don't need to tell us why but it would show that you are taking things seriously). A valid reason is to save power, but remember that you can save a significant portion of your system power by:

• Sleeping when you don't need to do anything
• Reducing the frequency of AHB, APB

Hope this helps,

Danish

[Ozone]

Running at reduced speed does not necessarily reduce overall power consumption.

A company called Energy Micro (now bought up by Cypress AFAIK) had success with optimizing sleep mode consumption of Cortex M cores instead.

Short burst execution periods with optimized sleep consumption might be better suited for battery operations.

[Piranha]

In fact all clock changes are done during runtime.