Does anyone realize that the STM32L4 w FreeRtos using CubeMx and enabling Tickless mode is highly flawed.
I have been analyzing the flaws in the implementation of the STM32 CUBEMx HAL implementation of FreeRTOS's tickless implementation. In its currently selectable configurations FreeRTOS tickless simply doesn't work as intended -- period.
My test case uses an STM32L476 with CUBEmx 5.1 eclipse plug-in to both the Atollic TrueStudio Ver 9.3 and System Workbench coupled with both STM32Cube FW_L4 V1.13.0 and STM32Cube FW_L4 V1.14.0. Debugging is via an STLink V2 pod. Additionally I use an inexpensive digital logic analyzer to monitoring a number of available gpio ouput pins to be able to monitor wake sleep tick processing in real time in various parts of the code base.
I have determined that:
- When FreeRtos is enabled with the cube default set to SysTick management it increments the normal tick cell used by HAL_IncTick() and HAL_GetTick().
- When FreeRtos is configured for Tickless mode, it (incorrectly) maintains a second 32 bit tick counter. This it does correctly EXCEPT that now there are two tick counters. The osDelay(ticks) function runs off of the HAL_IncTick() counter BUT that interrupt is suppressed when tickless invokes sleep. When Tickless wakes, it oly updates its own tick counter but does not update the HAL_incTick to match. The result of this is that any osDelay timing is corrupted by the lack of synchronization.
- CUBEMx tells you that it want's you to select an alternate timer for SysTick when you are using FreeRtos. This works and the alternate time base will drive the normal timing BUT when you do this, even when you select tickless mode IT WILL NOT WORK. This is because of several fundamental design flaws. The flaw of having two tick counters when you should only have one, The organization of the code bases such that the port.c code is designed for the default SysTick ONLY and has no code to use the alternate time base.
The fundamental code structure for tick management between the CUBEMx generator, the HAL libraries, Free RTOS and the port.c code is flawed because it is not layered correctly. Besides the taboo of having two buried tick accumulation words, it often has data and procedures implemented as static (private to the source module) rather than public. Certain cross layer data access functions are missing, and various default tick management functions which should be marked as __weak so that they can work in the default case or be overridden in a proper layered implentation are not so marked.
Test case experiments to date have shown that this mess is correctable BUT since I need the functionality and I need to use CUBE for project management, I'm going to have to patch the libraries to add the missing cross layer accesses and preserve the CUBE regeration functionality.
I am open to the STM32 CUBE and Library maintanence staff contacting me if they wish conduct a more detailed discussion. If not then <shrug>. Also, while I am open to a knowledgeable discussion on this, I am also sufficiently busy that off topic questions or those asked about things that are obvious when one studies the relevant code will most likely have to go unanswered.
Once I complete my analysis and successful patching I plan to write a definitive paper on the the STM32 FreeRTOS tickless code corrections and publish it here. Even so expect the STM folks to implement any corrections in their own way.
