Debug interface of STM32H7 question

[Pavel A.]

Dear experts,

I'm new to M7 (and H7) so pardon me for a stupid question.

Created a new .ioc file in CubeMX 5.3.0 for STM32H753 EVAL2 board.

There I can select debug interface as JTAG 5 pins or Serial wire (at least).

From the Cube report file, in Serial Wire mode it uses 2 pins:

PA14 SWCLK

PA13 SWDIO

Where is SWO ? It should be PB3, but the report file does not mention it.

In JTAG 5 pins mode it uses

PA14, PA15, PA13, PB3, PB4.

Now, in a .ioc file made by my hardware engineer, for a custom board with same MCU,

the debug mode is JTAG 5 pins.

But I cannot change it to Serial wire or even to Disabled.

Any reason, why?

None of these 5 pins are hmm... pinned.

Serial mode uses two (or three?) of JTAG 5 pins, so it should be possible to reuse them?

Is the JTAG config locked by some other component or mode selection?

Or can it be a "feature" of the Cube ?

We both have Cube 5.3.0 on Linux, Ubuntu,

Thanks in advance

Pavel A.

[Tesla DeLorean]

Well TDO/SWO on PB3 does work, the plumbing is more complicated as you need to configure which MCU connects up.

You're persistent in the face of much brokenness. I don't think much of CubeMX gets tested in real-world situations, and definitely not with any rigor.

Full JTAG at least permits boundary scan, and you can chain in other components. Unless you're completely bereft of pins I would avoid committing them,

[Pavel A.]

Clive,

Do you recommend JTAG mode over SWD for H7?

I've used only SWD mode before with F4, F0 and various ST-LINKs

Is boundary scan useful for the STM32 at all?

Thank you.

-- pa

[Tesla DeLorean]

Boundary scan needs a lot of detail to execute properly, I worked with guys that build JTAG tools, schematic/net-list post-processing tools, and such.

You'd need JTAG to talk to multiple STM32 in a chain, or chained with FPGA/CPLD.

We've used it in the past to check boards, pin-to-pin continuity, etc.