Configurations for FMC NOR flash on STM32H7A3

[LCris.1]

HI,

I have a custom board with FMC NOR memory S29GL512S11 controlled by STM32H7A3. I created one external loader to flash the NOR memory and works wells. When I try to use the same configurations with the SYSCLK 280MHz and FMC clock 140MHz I can't have any access to the memory.

I try to find one way to calculate the right timings for both devices to configure the FMC module, but with the memory datasheet and RM0455 I don't understand how I can make the right configuration.

At the moment I have this configuration:

 hnor.Instance = FMC_NORSRAM_DEVICE;
 hnor.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
 hnor.Init.NSBank = FMC_NORSRAM_BANK1;
 //HAL_NOR_MspInit(&hnor); 
 //HAL_NOR_DeInit(&hnor); 
 
 NOR_Timing.AddressSetupTime = 7;
 NOR_Timing.AddressHoldTime = 15;
 NOR_Timing.DataSetupTime = 2;
 NOR_Timing.BusTurnAroundDuration = 3;
 NOR_Timing.CLKDivision = 16;
 NOR_Timing.DataLatency = 17;
 NOR_Timing.AccessMode = FMC_ACCESS_MODE_B;
 
 hnor.Init.NSBank = FMC_NORSRAM_BANK1;
 hnor.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
 hnor.Init.MemoryType = FMC_MEMORY_TYPE_NOR;
 hnor.Init.MemoryDataWidth = NOR_MEMORY_WIDTH;
 hnor.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
 hnor.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
 hnor.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
 hnor.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
 hnor.Init.WaitSignal = FMC_WAIT_SIGNAL_ENABLE;
 hnor.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
 hnor.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
 hnor.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
 hnor.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
	 hnor.Init.WriteFifo =0x0 ;
 hnor.Init.PageSize = 0x0; 
 
 /* Initialize the NOR controller */
 if(HAL_NOR_Init(&hnor, &NOR_Timing, &NOR_Timing) != HAL_OK)
 {
 /* Initialization Error */
 return 1;
 }
 return 0;

How I can solve this problem?

[LCris.1]

I discover where is my problem.

The STM32CubeMX have a issue generate the clock code. The CubeMX don't generate the configuration for FMC clock MUX. I add the line to the generated code and now memory works :)

[Pavel A.]

@LCris.1​ Could you tell us what was missing? Is there a bug of CubeMX ?

​

[Tesla DeLorean]

Sounds like the peripheral clocks, or the clock routing via RCC, most things now allow for multiple sources, different connectivity to PLLs, that need themselves to be running. SDMMC for example has many possible clocking sources.

Clock Tree diagrams/tables in the RM might be illuminating.

[LCris.1]

Hi,

I discover that CubeMX miss to generate the configuration for FMC mux clock like folling image.

The code marked by red miss on generated code by CubeMx for STM32H7A3, like a next image show.

 

Best Regards,

Luis Cristovão

[Amel NASRI]

Thanks @LCris.1​ for sharing the solution you found.

Could you please precise the version of STM32CubeMX you are using?

That is important to let our experts @Khouloud OTHMAN​ and @Sara BEN HADJ YAHYA​ investigate the issue and take relevant actions to fix it.

-Amel

[Sara BEN HADJ YAHYA]

Hello @LCris.1​ ,

Thanks for your feedback,

I tried to test from my part using CubeMX 6.5.0 and 6.4.0 but I didn't get the same result as you, the following lines are generated correctly.

PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC;
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;

Could you please share your ioc file to help us trace the source of the issue?

Thanks,

Sara.

[LCris.1]

Hi,

I use the CubeMX 6.4. It's my .ioc file. I don't know why but in my file isn't generated this lines.

Best regards,

Luis Cristóvão

[Sara BEN HADJ YAHYA]

Hello @LCris.1​ ,

I am still getting the same results, the lines are generated correctly.

For now, I advise you to try the latest CubeMX version (v6.5.0).

Sara.

[LCris.1]

Hi @Sara BEN HADJ YAHYA​ ,

I try to generate the code and now in my code wasn't configured the FDCAN mux. The code generated this morning is:

void PeriphCommonClock_Config(void)
{
 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 
 /** Initializes the peripherals clock
 */
 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC|RCC_PERIPHCLK_ADC;
 PeriphClkInitStruct.PLL2.PLL2M = 2;
 PeriphClkInitStruct.PLL2.PLL2N = 10;
 PeriphClkInitStruct.PLL2.PLL2P = 1;
 PeriphClkInitStruct.PLL2.PLL2Q = 1;
 PeriphClkInitStruct.PLL2.PLL2R = 2;
 PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
 PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
 PeriphClkInitStruct.PLL2.PLL2FRACN = 1967;
 PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
 PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 {
 Error_Handler();
 }
}

You have reason generate the FMC but don't generate the FDCAN mux selector.

Best regards,

Luis Cristóvão

[Sara BEN HADJ YAHYA]

Hello @LCris.1​ ,

According to your ioc file, the FDCAN clock source is PLL1Q so the clock config is supposed to be generated in HAL_FDCAN_MspInit() but in your case, the "Generate Code" option is unchecked in Project Manager -> Advanced Settings so the clock config won't be generated.

By checking the "Generate Code" Option and changing the FDCAN clock source to PLL2Q the clock config will be generated in PeriphCommonClock_Config().

NOTE:

Only peripherals using PLL2, PLL3, PLLSAI1, PLLSAI2 as a source clock are configured in PeriphCommonClock_Config() and only when they are used by more than one peripheral. Otherwise the clock init will be generated in HAL_IPNAME_MspInit or in MX_IPINSTANCE_Init.

I hope this helps :)

If your issue is solved, please close this post by clicking the "Select as Best" button. This will help other members of the community find this response more quickly :)

Sara.