[BUG] RTC cannot be used when code for RCC is generated using LL

[nicolas b]

Posted on May 14, 2018 at 12:08

Hello,

We had an issue with the code generated for RCC on STM32F413RHT6 when the RTC module came into play. RCC was configured to use the LL library but the generated code has some problems.

void SystemClock_Config(void)

{

  LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);

   if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)

  {

  Error_Handler();  

  }

  LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);

  LL_RCC_HSI_SetCalibTrimming(16);

  LL_RCC_HSI_Enable();

   /* Wait till HSI is ready */

  while(LL_RCC_HSI_IsReady() != 1)

  {

    

  }

  LL_PWR_EnableBkUpAccess();

  LL_RCC_ForceBackupDomainReset();

  LL_RCC_ReleaseBackupDomainReset();

  LL_RCC_LSE_Enable();

   /* Wait till LSE is ready */

  while(LL_RCC_LSE_IsReady() != 1)

  {

    

  }

  LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);

  LL_RCC_EnableRTC();

  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_16, 112, LL_RCC_PLLP_DIV_2);

  LL_RCC_PLL_Enable();

   /* Wait till PLL is ready */

  while(LL_RCC_PLL_IsReady() != 1)

  {

    

  }

  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);

  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);

  LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);

  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);

   /* Wait till System clock is ready */

  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)

  {

 

  }

  LL_Init1msTick(56000000);

  LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);

  LL_SetSystemCoreClock(56000000);

  LL_RCC_SetTIMPrescaler(LL_RCC_TIM_PRESCALER_TWICE);

  /* SysTick_IRQn interrupt configuration */

  NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0));

}

• SystemClock_Config() modifies the PWR::CR::DBP bit but the PWR clock is not activated at this point. As a consequence, the backup domain is not unlocked and then the configuration of the RTC module fails�Our workaround was to call LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); before SystemClock_Config().
• SystemClock_Config() calls LL_RCC_ForceBackupDomainReset() hence resetting all the settings of the RTC. In particular any previously set date or time�

Our workaround was to use HAL instead of LL to generate the code for RCC.

#cubemx-v4.25.0 #low-layer #code-generation

[Imen.D]

Posted on May 15, 2018 at 13:00

Hello

nicolas.bonnec

,

Iraised internally this issue for check and we come back to you as soon as possible with more details.

Best Regards

Imen

[Nawres GHARBI]

Posted on May 16, 2018 at 19:13

Hi

nicolas.bonnec

‌

It has been fixed and will be available next release 4.0

[JRoa]

I have the same problem with STM32F051R8T6 and STM32Cube MX v.5.0.0

/**

 * @brief System Clock Configuration

 * @retval None

 */

void SystemClock_Config(void)

{

 LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);

 if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)

 {

 Error_Handler();  

 }

 LL_RCC_HSI_Enable();

  /* Wait till HSI is ready */

 while(LL_RCC_HSI_IsReady() != 1)

 {

   

 }

 LL_RCC_HSI_SetCalibTrimming(16);

 LL_RCC_HSI14_Enable();

  /* Wait till HSI14 is ready */

 while(LL_RCC_HSI14_IsReady() != 1)

 {

   

 }

 LL_RCC_HSI14_SetCalibTrimming(16);

 LL_RCC_LSI_Enable();

  /* Wait till LSI is ready */

 while(LL_RCC_LSI_IsReady() != 1)

 {

   

 }

 LL_PWR_EnableBkUpAccess();

 LL_RCC_ForceBackupDomainReset();

 LL_RCC_ReleaseBackupDomainReset();

 LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_HIGH);

 LL_RCC_LSE_Enable();

  /* Wait till LSE is ready */

 while(LL_RCC_LSE_IsReady() != 1)

 {

   

 }

 LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);

 LL_RCC_EnableRTC();

 LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_4);

 LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);

 LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);

  /* Wait till System clock is ready */

 while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)

 {

  

 }

 LL_Init1msTick(2000000);

 LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);

 LL_SetSystemCoreClock(2000000);

 LL_RCC_HSI14_EnableADCControl();

 LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK1);

}

[JBern.19]

Am I doing it wrong or is this still an issue?

The generated startup code hangs on LL_RCC_LSE_IsReady() because the PWR clock in not running and thus enabling the LSE never works.

Also the backup domain is always reset which may not be desirable.

STM32CubeMX 5.6.0

STM32Cube FW_L4 V1.15.1