Bug in stm32cubeMX/IDE in STM32F4 Code generation, With DMA

[PArch.1]

When generate code via stm32cubeIDE from .ioc ,It Randomly generate line MX_DMA_Init(); Before / After other Module .

Problem is, When other module have some DMA config inside , for me ,it ADC , But MX_DMA_Init(); generate after MX_ADC1_Init(); , That mean __HAL_RCC_DMA2_CLK_ENABLE(); and __HAL_RCC_DMA1_CLK_ENABLE(); inside MX_DMA_Init(); not ativate when ADC config DMA inside HAL_ADC_MspInit , Clock for DMA is not enable when ADC DMA config happen, So that configs are void and don't have effect.

For me it appear randomly

I temperaly fix by add __HAL_RCC_DMA2_CLK_ENABLE();

 __HAL_RCC_DMA1_CLK_ENABLE(); in /* USER CODE BEGIN SysInit */

Did we have some way to fixed the other of mx init sequence?

Sorry for my english

[TDK]

https://community.st.com/s/question/0D53W00001EzCmCSAV/mxdmainit-order-in-the-mainc-file-generated-by-stm32cubemx-how-to-fix