Bug in STM32CubeMX clock configuration

[wenbin]

Posted on November 12, 2015 at 13:52

Experiment Set-up:

STM32CubeMX version: 4.11.0

STM32F746NGH6

Description:

It limits the PCLK1 to 50 MHz and PCLK2 to 100 MHz. See the RED error below:

However, The PCLK1 can reach 54 MHz and PCLK2 can reach 108 MHz after over-drive.

#stm32cubemx-

[Nesrine M_O]

Posted on November 12, 2015 at 14:12

Hi zhong.wenbin.001,

Thank you for your feedback. The issue has been reported internally.

-Syrine-

[stm32cube-t]

Posted on December 01, 2015 at 11:51

Dear user,

Thank you for reporting this issue. It will be solved in STM32CubeMX release 4.12.0.