Senior III
April 15, 2020
Question
BUG: 3 different clocks labeled PLLI2SCLK in CubeMX
- April 15, 2020
- 4 replies
- 1672 views
In the clock tool picture below, no less than 3 separate and different clocks are labeled PLLI2SCLK.
- Top output of PLLI2S
- Bottom output of PLLI2S (which has another divisor Q)
- Input to SAI-A mux (which has yet another unlabeled divisor)
So, which one is input to MCO2 source mux?
Also, calculated clock values should be shown on arcs!
ST, Please confirm you understand and reproduced the problems and have filed one or two bug reports...
IOC attached.
PS: CC @Amel NASRI (ST Employee), @Camilo LEMOS (ST Employee)
