STM32H7 dual core debugging. M4 pc goes rogue.
Hi Community,
I am getting familiar with the STM32CubeIDE Dual Core Debugger capability for the H7 chip.
I am using code generated from STM32CubeMX of the IDE.
The versions I am using are:
STM32CubeIDE 1.4.1
STM32CubeMX 6.0.1-RC3
NUCLEOH745ZI-Q
This is the code I am using. I added this Variable to help me see evaluate the debugging but it shouldn't affect what I am seeing.
uint16_t thisVariable = 0;
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* USER CODE BEGIN Boot_Mode_Sequence_1 */
/*HW semaphore Clock enable*/
__HAL_RCC_HSEM_CLK_ENABLE();
// /* Activate HSEM notification for Cortex-M4*/
HAL_HSEM_ActivateNotification(__HAL_HSEM_SEMID_TO_MASK(HSEM_ID_0));
// /*
// Domain D2 goes to STOP mode (Cortex-M4 in deep-sleep) waiting for Cortex-M7 to
// perform system initialization (system clock config, external memory configuration.. )
// */
HAL_PWREx_ClearPendingEvent();
HAL_PWREx_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFE, PWR_D2_DOMAIN);
// /* Clear HSEM flag */
__HAL_HSEM_CLEAR_FLAG(__HAL_HSEM_SEMID_TO_MASK(HSEM_ID_0));
/* USER CODE END Boot_Mode_Sequence_1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
thisVariable++;
if (thisVariable == 10000){
thisVariable = 0;
}
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}These are the scenarios that I see:
Scenario 1
- I start the M7
- I start the M4
- M4 ends up at some wild address outside program memory
Scenario 2
- I start the M7
- I step through the M4 code until I reach line 26 Hal_Init()
- I then set M4 code to run
- I can have either core stop the other as expected
Scenario 3
- I start the M7
- I comment out line 18 of the M4 code
- I start the M4
- I can have either core stop the other as expected
The code that affects this is the code generated by the IDE/MX. Has anyone seen something similar and resolved it ? I saw a post about a revision of HW that had a dodgy regulator. I am not sure if that is what I am seeing.
Any help would be appreciated.
