Still fighting to setup SWO trace on STM32H7

[Gpeti]

Hello,

A few months ago I tried without success to setup ITM on a STM32H753I-EVAL2 board (and STM32CubeIDE). Now I'm trying again. There is a precise point I'm not sure about: the signal SWO is multiplexed on GPIO PB3, so I have to setup PB3 with alternate function SWO in my software. But is the SWO signal routed to the STLink ? Or in other terms: is it enough to plus the board through USB to the STLink to get the ITM outputs ?

Thank you

PS: I'm well aware of the following thread: https://community.st.com/s/feed/0D50X00009nNBBHSA4

[Tesla DeLorean]

The schematic should be pretty definitive about what wires connect to what.

I have some of the earlier H743I-EVAL boards, with an ST-LINK V2.

​

The board with the V3 will likely not use 2 MHz SWD clock, but rather a 15 MHz one. Watch this value when setting baud rate dividers vs core clock.​

[Gpeti]

"The board with the V3 will likely not use 2 MHz SWD clock, but rather a 15 MHz one" I noticed that when GDB loads the software it displays "SWD freq: 24.000 KHz". It is consistent with the STLink v3 user manual.

So I guess I should modify the value when setting the divider ? But I cannot set 24MHz in Debug Configuration.

[Gpeti]

Clive, did you manage to make SWO work ? I understand from this link that you could not : https://community.st.com/s/question/0D50X00009XkhURSAZ/stm32h7-swo-printf-not-working

About the clock, STM32CubeIDE does not allow to setup a SWO clock faster than 2MHz.

[Tesla DeLorean]

The link cited in the top post showed that I did.​

[Gpeti]

OK. I've read this message from you "Yeah, bit frustrated with the response here too. Not seen SWV connectivity work on any H7 board (have EVAL and DISCO here), and fiddled with it a lot, although " but the date of the post was confusing.

[Gpeti]

Thank you Pavel, I did exactly the same setup. What is still not clear for me is the initialisation routine: Clive posted a detailed C function to be called by the debugger. But I'm calling this very same function from my C code. Is it correct ? How did you do on Atollic ? (debugger script or embedded function)

[Pavel A.]

Guillaume, there's nothing at all in my code to set up the debug interface. Both Atollic and Keil debuggers do it themselves.

Unless there's something hidden in the libraries.

-- pa

[Gpeti]

Really ? Then I really don't understand the code published in this post

So basically on keil and atollic, there is nothing else to do than setup the debug and launch the trace (and obviously instrument the code with ITM stimulus write). Probably due to this f... STM32CubeIDE.

[Pavel A.]

> IN JUNE 2018 the Keil debugger and ST-LINK drivers didn't configure the core correctly for SWV to work, this was therefore FACILITATED by code run on the core, EITHER as a Debug Script, OR arbitrary code run on the micro-controller directly.

This is strange... I've started with STM32F4 and Keil only in 2017, and don't remember enabling the ITM on the MCU side at all, and no using special scripts.

The oldest uVision I had was 5.24.

In the Silicon Labs IDE once there was a similar problem and they posted a similar code to enable ITM.

But before I had a chance to try it, they updated the IDE and now it also does this automagically.

Regards,

-- pa

[Tesla DeLorean]

Coming back to this much later, but will address this with some context..

The F4 worked because it had more normative ITM/SWV implementation for a SINGLE core, not sure ARM had the multi-drop SWD implemented, and it certainly wasn't handled in KEIL's and ST's commercial releases of the era.

The issue here is with the original H743 implementations which was multi-core M7+M4, there were lots of iterations of the die before the multi-core was fully working as ARM+ST were working through teething issues. Notably I have X, Y, Z and V die parts. ST was probably first-silicon partner on this. During this time ST only publicly disclosed the M7 core, but everything internalyl was built to be multi-core, the SWD mechanics changed to facilitate this but Keil and other debuggers didn't support it with delivered drivers.

The ITM worked just fine on all the CM3, CM4, CM7 single core devices it was optioned on.

This CM4+CM7 combination has a significantly more complex implementation and funnel to facilitate connectivity to the individual cores. This I think now as documentation in the RM for the H743/745/753/755 parts.

Torsten Jaekel had done a lot of work on this based on his familiarity with SoC ARM designs, and related IP.

[Aleks]

Hi all in 2022.

I can't connect via STLink to custom board when enable SWO (STM32H725).

The core clock is 400Mhz.

I use CubeIDE to generate configuration code.

When SWO is disabled, debug run without any problem.

The mailfunction is still present in debug tool, or problem in configuration, etc?

Thank you.

 

[Tesla DeLorean]

For a start it's a different part using a different die. Is the board correct? What type of ST-LINK, with what firmware?

Do other aspects of the design function?

Does the NUCLEO-H723​ work in similar circumstances?

[Pavel A.]

IIRC, H72/3x has some change in ITM vs. older chips (a different frequency divisor or smth. like this). It was discussed here and known to be fixed in the latest ST tools. Do you have the latest? Maybe you use J-LINK? there's another bug mentioned here, specific to J-LINK and ITM.

[Tesla DeLorean]

Let's please move this discussion to a new thread.

[Aleks]

Yes of course. Could you please make it, or explain me how I can make it himself.

[Aleks]

Hi.

Thanks for responce.

My tool is

ST-LINK/V2 B2018 52, firmwire V2J39S7,

CUBE IDE Version: 1.8.0 Build: 11526_20211125_0815 (UTC),

STM32H725IGK6

I am sure that board is correct, it programmed via SWD, run, debug without any problem. Settings is

I have not board with STM32H725, but I'll try it later with Nucleo board with M7.

ST Link cannot connect to board until power on reset if enabled SWV. I try configure system clock to 550, 400, 200 MHz.

[Aleks]

Thanks all. It seems the core of problem is missing connection on my PCB - pin PB3 is not routed. Hardware design is not implemented proper. So so, I watch about SWO in the ST youtube channel, try to use it, but video not touch hardware part. And today I am little bit unhappy.

AN4989:

The asynchronous mode (SWO) requires 1 extra pin and is available on all packages for STM32 based on Cortex-M3, -M4, and -M7.

Everything just started!

[Muhammed Güler]

https://www.st.com/resource/en/schematic_pack/mb1246-b0x_schematic.pdf

The connection appears on the card drawing.

[Aleks]

Muhammed, thank you.​