Name of CSR, where documented, where in Register View of STM32CubeIDE?

[chriskuku]

I'm seeking for the following information:

1. What is the CPU flag/control& status register (CSR) called and
2. where - ST document - is it documented?
3. Looking at the STM32Cube IDE debugger view (gdb register view)

what is this register called and where are the Carry, Sign,Zero etc.

bits?

[Andrew Neil]

CPU registers will be part of the ARM Core - so will be documented in the ARM documentation; eg,

https://developer.arm.com/documentation/dui0552/a/the-cortex-m3-processor/programmers-model/core-registers?lang=en

[chriskuku]

Thanks. If you compare this with the register view of STM32CubeIDE,like:

General Registers      General Purpose and FPU Register Group   

   r0   0x7 (Hex)      

   r1   0x10000000 (Hex)      

   r2   0x1 (Hex)      

   r3   0x10000004 (Hex)      

   r4   0x510 (Hex)      

   r5   0x40007000 (Hex)      

   r6   0xe000e010 (Hex)      

   r7   0x10001444 (Hex)      

   r8   0x20a8 (Hex)      

   r9   0x71ca (Hex)      

   r10   0x10000444 (Hex)      

   r11   0x10000844 (Hex)      

   r12   0      

   sp   0x10000c44      

   lr   1531      

   pc   0x5fc <exeToken>      

   xpsr   0x21000000 (Hex)      

   d0   0      

   d1   0      

   d2   0      

   d3   0      

   d4   0      

   d5   0      

   d6   0      

   d7   0      

   d8   0      

   d9   0      

   d10   0      

   d11   0      

   d12   0      

   d13   0      

   d14   0      

   d15   0      

   fpscr   0      

   primask   1      

   basepri   0      

   faultmask   0      

   control   0      

   msp   0x10000c44      

   psp   0x0      

   s0   0      

   s1   0      

   s2   0      

   s3   0      

   s4   0      

   s5   0      

   s6   0      

   s7   0      

   s8   0      

   s9   0      

   s10   0      

   s11   0      

   s12   0      

   s13   0      

   s14   0      

   s15   0      

   s16   0      

   s17   0      

   s18   0      

   s19   0      

   s20   0      

   s21   0      

   s22   0      

   s23   0      

   s24   0      

   s25   0      

   s26   0      

   s27   0      

   s28   0      

   s29   0      

   s30   0      

   s31   0      

How do they correspond? What are the bits for C,Z,S etc. in the PSR (xpsr)?

What do d0-d15 resp. s0-s31 stand for?

[Tesla DeLorean]

https://developer.arm.com/documentation/ddi0419/c/System-Level-Architecture/System-Level-Programmers--Model/Registers/The-special-purpose-program-status-registers--xPSR?lang=en

[Nikita91]

Download and read the "Programming Manual" for the MCU Family you use.

The ARM core registers are explained.

The d0-d15 and s0-s31are the floating point registers

[Andrew Neil]

Also get hold of a copy of Joseph Yiu's "Definitive Guide" book for whichever core(s) you're using...

https://www.elsevier.com/search-results?query=Joseph%20Yiu