printf("\n\nCore=%d, %d MHz\n", SystemCoreClock, SystemCoreClock / 1000000);
The SWO side clock is usually determined by the debugger side interface, ie 2 MHz or whatever, and it then programs the chip side SWO baud rate and encoding scheme to relate the two. ie divisor = (168000000 / 2000000) - 1
The H7 side code looked like this
//SWO current output divisor register
//This divisor value (0x000000C7) corresponds to 400Mhz
//To change it, you can use the following rule
// value = (CPU Freq/sw speed )-1
*(__IO uint32_t*)(0x5C003010) = ((SystemCoreClock / 2000000) - 1); // SWO_CODR
Other systems
TPI->ACPR = ((SystemCoreClock / 2000000) - 1); /* "Async Clock Prescaler Register". Scale the baud rate of the asynchronous output */
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