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HDesa.1
Associate III
June 6, 2024
Question

Guide for STM32 fmc nand flash

  • June 6, 2024
  • 13 replies
  • 5643 views

Hello,

Can anyone help me with interfacing NAND flash with STM32H7 microcontroller? I am unable to find any reference guide or application note related to the same.

-Regards

This topic has been closed for replies.

13 replies

mƎALLEm
ST Technical Moderator
June 6, 2024

Hello,

Unfortunately there is no AN for NAND Flash using STM32H7.

May I propose the old application note:  AN2784 "Using the high-density STM32F10xxx FSMC peripheral to drive external memories " / Section 4 "Interfacing with an 8-bit NAND Flash memory". H7 and F1 don't have the same architecture and the version of the FMC interface but it could give you an idea of how to interface the NAND flash with an STM32. 

You can also inspire from STM3210E-EVAL board BSP implementation from here: https://github.com/STMicroelectronics/stm3210e-eval-bsp/blob/6b36c9912e39594ef9fba24d1e218b8dc3e62a2d/stm3210e_eval_nand.c 

 

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Peter BENSCH
ST Technical Moderator
June 6, 2024

@HDesa.1 

But please also note that, unlike eMMC, for example, simple NAND flash does not contain wear levelling, so you will have to programme this yourself. You shouldn't underestimate the effort involved and, like most users, you will probably end up simply using eMMC because everything is already implemented there.

There used to be a rudimentary software example for wear levelling from NAND, but it is completely outdated and therefore no longer usable.

Good luck!
/Peter

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Tesla DeLorean
Guru
June 6, 2024

Well that, and the fact the eMMC has a more standardized foot print so is less likely to get randomly EOL'd in a form-factor that's unique, or incompatible across vendors.

Also the ERASE BLOCK size is unhelpfully large for NAND's on smaller MCU. ECC syndrome generation / checking is frequently done on the chips these days, based on the geometry/structure, but actual correction of the data needs to be hosted locally.

Half the battle with the NAND's will be to READ THE DOCUMENTATION, the STM32 side is merely one of address decoding, and access to the command and data portals into the NAND itself, and that's not where the complexity is.

Determine if NAND is appropriate for your use case. This is not stated in the question, nor the anticipated capacity.

There are also QSPI NAND Flash devices, that might be easier to interface with less pins.

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HDesa.1
HDesa.1Author
Associate III
June 7, 2024

Thank you for the advice. I will see to it while implementing

-RegardsHrishikesh
HDesa.1
HDesa.1Author
Associate III
June 13, 2024

@mƎALLEm @Tesla DeLorean 

Guys, I wrote this post in order to find a proper solution on the usage of NAND flash with STM32 microcontroller which I wasn't able to find. Though there are not direct solution available on the internet, I was hoping to find some direction so as to implement my design.

I request you to please not to get into an argument over such issues. Developers like me come here looking for solution from you guys and similar other developers. I hope I am not wrong at that. Apologies if I said something irrelevant.

Though I try to read every suggestion posted as it might help me somehow in my projects. Also if you guys still can provide me more solutions and suggestion on this topic, they are most welcomed.

Thanks & Regards

-RegardsHrishikesh