That globally not possible, Cortex-M4 is mostly a slave coprocessor of Cortex-A7 Linux.
Cold boot is always from Cortex-A7 BootROM.
Nevertheless Cortex-M4 could be kept running while Linux is in low-power mode (e.g. suspend to RAM).
Alternatively, Cortex-M4 could start (alone) from it's RETRAM upon STANDBY exit (i.e. Linux has been started and put the platform in STANDBY mode), then you could implement an SRAM code load from external component (e.g. QSPI Flash, if not used by Linux).
All that is not natively supported in our HW/SW and need some tricky SW development on your side. Maybe you have to refine your concept to see if it could fit the regular STM32MP1 available mechanisms.
recommended reading:
https://wiki.st.com/stm32mpu/wiki/Power_overview
https://wiki.st.com/stm32mpu/wiki/Coprocessor_power_management
https://wiki.st.com/stm32mpu/wiki/Boot_chains_overview
https://wiki.st.com/stm32mpu/wiki/STM32MP15_ROM_code_overview
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