STM32 MPUs Products and hardware related

We are working on a custom board based on STM32MP257F-AI3. We flashed an X-Linux RT patched image via SD card in boot mode 0001(A35-Master), and in the ST Cube Programmer flashing completed successfully with a "download successful" pop-up in when boot mode USB/UART switches configuration is 0000.After powering off, we set the boot switches to 0010 (eMMC boot, A35 master), but the board fails to boot properly from eMMC.Could you please help us identify:Whether the image correctly written to the eMMC boot partitions (FSBL, SSBL, U-Boot, etc.)?Any mandatory post-flash steps required for enabling eMMC boot on STM32MP257?The correct boot configuration (TF-A, OP-TEE, U-Boot, extlinux or boot partition flags)Any guidance on debugging or verifying the eMMC boot flow would be helpful.

 Hello,I am working on STM32MP2 using the OpenSTLinux Weston distro and I am modifying the OP-TEE/device-tree files under the external-dt workspace using devtool.I need to remove a pin definition from the CA35 OP-TEE DTS files, but even after rebuilding the image, the pin still appears in the running system:  line 8: "PI8" input consumer="kernel"  This means my change was not applied.Steps I followed1. Environment setup  DISTRO=openstlinux-weston MACHINE=stm32mp2-rt source layers/meta-st/scripts/envsetup.sh  2. Opened the external-dt workspace  cd build-openstlinuxweston-stm32mp2-rt/workspace/sources/external-dt/devtool build external-dt  3. Edited the following DTS files to remove a tamper-related pinFiles I modified and added to git:stm32mp2/a35-td/optee/stm32mp257f-ev1-ca35tdcid-ostl-m33-examples.dtsstm32mp2/a35-td/optee/stm32mp257f-dk-ca35tdcid-ostl-m33-examples.dtsstm32mp2/a35-td/optee/stm32mp257f-ev1-ca35tdcid-ostl.dtsstm32mp2/a35

hello ST:     I used the stm32mp257 platform for KGDB debugging and found that it always resets the watchdog.     I tried to disalbe the relevant nodes in the device tree of the kernel and optee:      ///kernel： &arm_wdt { /*timeout-sec = <32>; status = "okay";*/ status = "disabled"; }; //Optee: &iwdg1 { /*timeout-sec = <32>; status = "okay";*/ status = "disabled"; };Will it still cause the system to restart after a period of time? How should this be handled?and this html Open fail~    

Hello ,I have developed a custom board using the STM32MP157DAA1. Its design is very similar to the STM32MP157-DK2.I am trying to build and boot TF-A and OPTEE. However, I am encountering an "I/TC: Forced system reset PSCI" error, which causes the system to enter a programming loop.Below is the CubeProgrammer log during this loop state:16:33:55 : USB speed   : High Speed (480MBit/s) 16:33:55 : Manuf. ID   : STMicroelectronics 16:33:55 : Product ID  : DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000 16:33:55 : SN          : 002700303532510837363531 16:33:55 : DFU protocol: 1.1 16:33:55 : Board       : -- 16:33:55 : Device ID   : 0x0500 16:33:56 : Start Embedded Flashing service 16:33:56 : Opening and parsing file: tf-a-stm32mp157d-a_cv2-mx-optee-programmer-usb.stm32 16:33:56 : Memory Programming ... 16:33:56 :   File          : tf-a-stm32mp157d-a_cv2-mx-optee-programme

Hello,I am integrating an STPMIC1x component to power my STM32MP153C-based system. This design is closely following the STM32MP157F-DK2 schematic found here. The issue comes from the fact that some of the default output voltages for STPMIC1APQR used in the design do not align with the necessary power inputs for some of the peripherals, namely the DDR3L chip. For example (in the EVK schematic), VDD_DDR on BUCK2 is by default Rank0 and set to 1.1V, which does not meet the DDR3L specification of 1.35V.The STPMIC1x datasheet implies that the A/B/D/E part numbers can provide the correct voltages for VDD and VDD_CORE by default (through Rank1, Rank2, or Rank3 outputs), and then the STPMIC1A/B/D/E can be (re)programmed by the MPU to provide the correct voltages on its other outputs such as its DDR3L peripheral. Q: Is this (re)programming of the STPMIC1x chips handled early in the boot process through OpenSTLinux and carried out on I2C4 from the MPU? If so, where does this occur

 Dear  Team,We are currently working with the STM32MP257F-DK board and would like to confirm whether the LPDDR4(MT53E1G32D1FW) memory mounted on this board supports inline ECC (Error Correction Code).Could you please provide details on the ECC capability and any relevant documentation regarding its configuration or usage? Thanks & Regards Akshitha Pattem

We are using a custom board with STM32MP257F using M33TD flavour, booting from QSPI SNOR. My understanding is that when reset is released, the processor runs some on-chip ROM code, which copies the FSBL from external NV storage into some on-chip RAM and then executes it in RAM. My questions are What is the default offset in the external device that the BOOT ROM code looks for the FSBL (I assume 0x00000000) Is it possible to override this by some mechanism to use another address higher in memory?

Hi, i created a basic m33 app via the default stm32mp257f-dk board project. When tring to boot the m33 app from the RFS, th m33 powers up and boot starts, however the kernal crashes with the below error. Any help understanding the nature/fix for the crash would be helpfull. Thx..root@stm32mp2unknownunknown:/lib/firmware# echo start > /sys/class/remoteproc/remoteproc0/state[ 53.569732] remoteproc remoteproc0: powering up m33[ 53.578881] remoteproc remoteproc0: Booting fw image M33_HelloNS_CM33_sign.bin, size 15796[ 53E/TC:0 stm32_iac_itr:192 IAC exceptions [159:128]: 0x10000000E/TC:0 stm32_iac_itr:197 IAC exception ID: 156E/TC:0 Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r2/core/drivers/firewall/stm32_iac.c:212 <stm32_iac_itr>E/TC:0 TEE load address @ 0x82000000E/TC:0 Call stack:E/TC:0 0x82007ef0E/TC:0 0x82043428E/TC:0 0x8202d54cE/TC:0 0x82040f5cE/TC:0 0x820141d0I/TC: Halting CPU 1 

I am creating a custom yocto image on a STM32MP157F-DK2. I am using the meta-stm32mp layer as apart of the bitbake build. Yocto version : Scarthgap When I run bitbake I get this failure  ERROR: hydra-image-1.0-r0 do_rootfs: Postinstall scriptlets of ['busybox'] have failed. If the intention is to defer them to first boot, then please place them into pkg_postinst_ontarget:${PN} (). Deferring to first boot via 'exit 1' is no longer supported. Details of the failure are in /home/hydra/yocto/build/tmp/work/stm32mp1_brady-hydra-linux-gnueabi/hydra-image/1.0/temp/log.do_rootfs. ERROR: Logfile of failure stored in: /home/hydra/yocto/build/tmp/work/stm32mp1_brady-hydra-linux-gnueabi/hydra-image/1.0/temp/log.do_rootfs.661419 ERROR: Task (/home/hydra/yocto/layers/poky/../meta-brady/recipes-core/images/hydra-image.bb:do_rootfs) failed with exit code '1' Log file   update-alternatives: Linking /home/hydra/yocto/build/tmp/work/stm32mp1_brady-hydra-linux-gnuea

Hello ST team,I’m working on a custom board based on STM32MP135F SoC, with GigaDevice GD5F4GM8UExxG (512 MiB SPI-NAND) connected on SPI1 interface.I’ve successfully integrated this NAND flash in U-Boot and Linux (Yocto build), but the board fails to boot directly from SPI-NAND. Please find the attached text file which is having the all changes.When booting from SD card, I can probe, erase, and write to the SPI-NAND successfully — data can be read back and verified. please check below logs:stm32mp13x:~# dmesg | grep spi[ 0.708654] spi-nand spi0.0: GigaDevice SPI NAND was found.[ 0.708678] spi-nand spi0.0: 512 MiB, block size: 128 KiB, page size: 2048, OOB size: 128[ 0.708944] 9 fixed-partitions partitions found on MTD device spi-nand0[ 0.708962] Creating 9 MTD partitions on "spi-nand0":I can able to flash the image to spi-nand flash successfully after configuring in the uboot and tfa.However, when I configure boot from QSPI-NAND, the boot ROM and TF-A logs indicate all blocks are bad. b

I am following getting started guide of this board STM32MP157x-DK2 https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-DK2/Develop_on_Arm%C2%AE_Cortex%C2%AE-A7/Create_a_simple_hello-world_application When I am connecting an ethernet cable, after a while, this error message pops again and again..  "Activation of network connection failed" on Ubuntu machine. I can't see the IP address so I am stuck at this step. 4. Deploy and executescp gtk_hello_world root@<board ip address>:/usr/local

I'm new to STM family, we are bought STM32MP157F-DK2 Discovery kits.We need OpenSTLinux image file where we can get  

I am trying to drive a 5 inch 800x480 touch display from waveshare using my STM32MP257F-DK development board. My Linux distro is a custom one built using Buildroot via bootlin support.When running `modetest -M stm -c`, I don't get any resolutions printed. Here's what I get:# modetest -M stm -c opened device `STMicroelectronics SoC DRM` on driver `stm` (version 1.0.0 at 20170330) [ 244.014209] EDID block 0 is all zeroes Connectors: id encoder status name size (mm) modes encoders 32 0 connected HDMI-A-1 0x0 0 31 props: 1 EDID: flags: immutable blob blobs: value: 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 0 5 link-status: flags: enum enums: Good=0 Bad=1 value: 0 6 non-desktop: flags: immutable range values: 0 1 value: 0 4 TILE: flags: immutable blob blobs: value: 33 dithering: flags: enum enums: Off=0 On=1 value: 0Here's what dmesg logs (Increased logging level using: `echo 4 > /sys/module/drm/parameters/debug`):[ 2

I want to connect my STM32MP257 eval board to the M.2 (WiFi) slot of a mini computer. I'm having a hard time finding the correct adapter and cable setup. Any help greatly appreciated.

Hello,Thee kernel compilation fails with the yocto (mickeldore) due to patch "0001-v6.1-stm32mp-r2.patch". The issue is with this snippet of the patch:@@ -3716,6 +3718,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq, hprt0 &= ~HPRT0_TSTCTL_MASK; hprt0 |= (windex >> 8) << HPRT0_TSTCTL_SHIFT; dwc2_writel(hsotg, hprt0, HPRT0); + hsotg->test_mode = windex >> 8; break;Since "test_mode" is only available when CONFIG_USB_DWC2_PERIPHERAL and/or CONFIG_USB_DWC2_DUAL_ROLE are set, the build fails with the following configuration:CONFIG_USB_DWC2_HOST=yCONFIG_USB_DWC2_PERIPHERAL=nCONFIG_USB_DWC2_DUAL_ROLE=nThis is a valid configuration. The patch should be amended as follows:@@ -3715,7 +3717,14 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq, "SetPortFeature - USB_PORT_FEAT_TEST\n"); hprt0 &= ~HPRT0_TSTCTL_MASK; hprt0 |= (windex >> 8) << HPRT0_TSTCTL_SHIFT; - dwc2_writel(hsotg, hprt0, HPRT0); +

Hello,I have developed a custom board using the STM32MP157DAA1. When I try to write the boot image, the process stops after writing fsbl-boot and does not proceed to the next step.I checked the output from the debug port and received the following log:NOTICE: CPU: STM32MP157DAA Rev.Z NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11 INFO: PMIC version = 0x21 INFO: Reset reason (0x15): INFO: Power-on Reset (rst_por) INFO: FCONF: Reading TB_FW firmware configuration f file from: 0x2ffe2000 INFO: FCONF: Reading firmware configuration informa tion for: stm32mp_fuse INFO: FCONF: Reading firmware configuration informa tion for: stm32mp_io INFO: Using USB INFO: Instance 2 INFO: Boot used partition fsbl1 NOTICE: BL2: v2.10-stm32mp1-r2.0(debug):() NOTICE: BL2: Built : 11:48:32, Oct 29 2025 INFO: BL2: Doing platform setup INFO: RAM: DDR3-DDR3L 16bits 533000kHz ERROR: DDR addr bus test: can't access memorPANIC at PC : 0x2ffed13d Exception

Hello. I'm trying to configure the otm8009a 800x480 display panel from the stm32mp157f-dk2 dev kit on the Seeed Studio's stm32mp157c-odyssey board.The issue is that by probing display with modetest -M stm I'm getting:failed to open device 'stm': No such file or directoryBut with modetest -M simpledrm I'm getting this output:Encoders: id crtc type possible crtcs possible clones 34 0 none 0x00000001 0x00000001 Connectors: id encoder status name size (mm) modes encoders 35 0 connected Unknown-1 127x211 1 34 modes: index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot #0 480x800 60.00 480 480 480 480 800 800 800 800 23040 flags: ; type: preferred, driver props: 1 EDID: flags: immutable blob blobs: value: 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 3 5 link-status: flags: enum enums: Good=0 Bad=1 value: 0 6 non-desktop: flags: immutable range values: 0 1 value: 0 4 TILE: flags: immutable blob blobs: value: CRT

Hi,I'm working on enabling USB 3.0 support for the STM32MP257 in U-Boot and need a suitable driver. I’ve attempted to modify the U-Boot kernel driver to support USB 3.0, but I’m running into issues with the PLL configuration.The problem seems to stem from setting up the correct clocking for the USB3 PHY. Despite adjusting the PLL parameters, I’m not getting stable operation, and the PHY doesn't initialize correctly. If you have any insights on configuring the PLLs for USB3 in U-Boot on STM32MP257, or if there's an existing implementation I could reference, I’d really appreciate your guidance.Thanks in advance!Here is my function.static int stm32_combophy_pll_init(struct stm32_combophy *combophy) { int ret = 0; u32 refclksel = 0, pllmult = 0, propcntrl = 0, sr = 0; unsigned long clk_rate = 0; int retry; const int max_retries = 5; /* get reference clock rate */ if (combophy->pad_clk) { clk_rate = clk_get_rate(combophy->pad_clk); printf("PADCLK rate: %lu\n", clk_rate); } else { clk

I am connecting my STM32MP257F-EV1 board to rpi Hailo 8 board via Mini Pcie to M.2 key M adapter. The board is not getting detected even though clock and reset signals are coming properly.I am using the stm32mp257f-ev1.dts (default device tree) and also sharing my device tree pci node below&pcie_rc {pinctrl-names = "default", "sleep";pinctrl-0 = <&pcie_init_pins_a>;pinctrl-1 = <&pcie_sleep_pins_a>;reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>;wakeup-source;wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;status = "okay";};I am getting this error as given below:-root@stm32mp2:~# lspci00:00.0 PCI bridge: Synopsys, Inc. Device 0550 (rev 01)root@stm32mp2:~# dmesg | grep pci[ 1.561630] stm32-pcie 48400000.pcie: host bridge /soc@0/rifsc@42080000/pcie@48400000 ranges:[ 1.570082] stm32-pcie 48400000.pcie: IO 0x0010010000..0x001001ffff -> 0x0010010000[ 1.586511] stm32-pcie 48400000.pcie: MEM 0x0010020000..0x0017ffffff -> 0x0010020000[ 1.60301

Hello all, I am following the following guide: https://wiki.stmicroelectronics.cn/stm32mpu/wiki/STM32MP25_Discovery_kits_-_Starter_Package In order to bring up a STM32MP257F-DK board and am running into a problem when I try to use the Programmer to flash the board. It gets to Partition 0x3 and at 31% fails saying it failed to download sector[0]. Specifically this is the output in the terminal:-------------------------------------------------------------------STM32CubeProgrammer v2.20.0------------------------------------------------------------------- USB speed : High Speed (480MBit/s)Manuf. ID : STMicroelectronicsProduct ID : DFU in HS Mode @Device ID /0x505, @Revision ID /0x2000SN : 003700494236501700363847DFU protocol: 1.1Board : --Device ID : 0x0505Device name : STM32MP23xx/25xxDevice type : MPURevision ID : --Device CPU : Cortex-A35Start Embedded Flashing service Opening and parsing file: tf-a-stm32mp257f-dk-optee-programmer-usb.stm32Memory Programming ...File : tf-

Hello everyone,I’m currently developing a custom board based on STM32MP151A, and I’ve successfully built my Open ST Linux  (Yocto Scarthgap / v6.6) image using my own Device Tree generated from STM32CubeMX and further customized for our hardware.The build process completes successfully — both U-Boot and Linux kernel compile without errors, and the final image is correctly produced.However, when I try to flash the image to the target using STM32CubeProgrammer, the upload fails and I get the error log attached below.12:56:16:446 : USB speed : High Speed (480MBit/s)12:56:16:446 : Manuf. ID : STMicroelectronics12:56:16:446 : Product ID : DFU in HS Mode @Device ID /0x500, @Revision ID /0x000012:56:16:446 : SN : 003E00273030510D3434343712:56:16:446 : DFU protocol: 1.112:56:16:446 : Board : --12:56:16:446 : Device ID : 0x050012:56:17:452 : Start Embedded Flashing service12:56:17:452 : sending a set alternate setting request with index: 512:56:17:453 : receiving packet12:56:17:454 : DFU s

Hi ST Community,I’m using the STM32MP257F-DK board and successfully followed this guide: Modify, rebuild and reload the firmware Everything worked fine during the initial setup and firmware modification. Now I’m trying to flash a new image to the SD card and connect to the board again, but I’m unable to establish a connection via ST-LINK. Here’s the error I get:ST-LINK SN : 003E004A3234510636303532 ST-LINK FW : V3J16M8B5S1 Board : STM32MP257F-DK Voltage : 3.29V Error: Unable to get core ID Error: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug AuthenticationI’ve set the boot switches to the OFF position (boot from UART/USB), and I suspect that during the previous steps, Secure Boot may have been enabled or modified without me realizing it. Could this be preventing me from accessing the board now?I’ve already tried:Updating ST-LINK firmware“Connect under reset” modeChecking physical connections and voltageIs there

Hello,we have product based on a STM32MP157 running Linux. The distribution is based on Yocto kirkstone and we are using a 6.1.82 Kernel. For the MP1s' GPU we use the open source entaviv driver that ships with this kernel. The device has a graphical user interface that is displayed on 4" display. The device can be operated remotely via a webbrowser as well.The visualization of our application is handled by a web gui so that we can provide a uniform user interface to users independet whether they log in via a browser on a host PC to the device or operate the device with the display. For this reason the GUI on the local device is in fact our web gui running in a browser in kiosk mode. For this local browser in kiosk mode we use the  Cog browser from the webkit project (version 0.18.2 with wpewebkit 2.42.5).Long story short: With this setup we are struggeling with performance issuses when operating the device locally with the cog browser. From my understanding webkit currently suppor

Honey, I purchased an STM32MP257-DK development board. I inserted a 16GB SD card, powered it with a 5V power supply, and connected the USB interface to the computer's USB port. After powering on, the COM indicator flashes red and yellow, and it cannot function properly. What could be the reason? My power supply current is sufficient.

 Hello ST Community,I am currently working on a custom board based on STM32MP257FAI3, derived from the STM32MP257F-EV1 evaluation board.We initially built our own custom image and successfully enabled several peripherals (SPI, USART, Timers, ADCs, and Interrupts) and tested on evaluation board as well.Now, while adapting the configuration for our custom hardware, I have modified all pin assignments according to the alternate functions listed in the datasheet and reference manual.Most of the pins are configured correctly and appear as expected in the system.However, I’ve noticed that certain pins (for example, PZ7 and PZ8, which were used for LPUART1 on the EV1) and some other pins in list are still shown as “consumer = kernel” in the output of:  gpioinfo -c /dev/gpiochip11even though I have:Removed their references from TF-A, U-Boot, and Linux kernel device treesDeleted their entries from the corresponding pinctrl and pinmux configurationsDespite these removals, the