Skip to main content
OKN
Associate III
August 22, 2026
Solved

STM32MP255F eth1 driver error

  • August 22, 2026
  • 2 replies
  • 32 views

Hello

I am building Linux on a custom board using the STM32MP255F-AK.


The following error occurs during kernel boot:

[ 15.371350] stm32-dwmac 482c0000.eth1: Failed to reset the DMA
[ 15.386447] stm32-dwmac 482c0000.eth1 end0: stmmac_hw_setup: DMA engine initialization failed
[ 15.389570] stm32-dwmac 482c0000.eth1 end0: __stmmac_open: Hw setup failed


After embedding printk in the kernel source code to investigate,
I found that dwmac4_dma_reset() in /drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c was returning ETIMEDOUT(110).

[dwmac4_lib.c]

int dwmac4_dma_reset(void __iomem *ioaddr) {
u32 value = readl(ioaddr + DMA_BUS_MODE);
/* DMA SW reset */
value |= DMA_BUS_MODE_SFT_RESET;
writel(value, ioaddr + DMA_BUS_MODE);
return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value,
!(value & DMA_BUS_MODE_SFT_RESET),10000, 1000000); }

I expect 0x482c0000 to be stored in ioaddr, but different values such as 0x82108000, 0x82128000, and 0x82xxx000 were stored there each time.


Ive looked into it from various angles but havent found a solution.
I suspect theres an issue with the Device Tree or other settings thats preventing ioaddr from being set correctly...

Where should I look to resolve this?

Best Regards,
--
okn

Best answer by OKN

Hello  @PatrickF  

We are using the ADIN1300 for the PHY.
The PHY clock is generated by a 25 MHz crystal.
I added st,ext-phyclk to the eth1 configuration in the device tree.
The stm32-dwmac error has been resolved, and end0 is now active.

Thank you very much for your helpful advice.

Best regards,
--
okn

2 replies

PatrickF
ST Employee
August 22, 2026

HI  @OKN  

Ethernet "DMA engine initialization failed" come usually from a missing clock (from PHY or RCC).

Maybe this post could give you some investigation angles.

https://community.st.com/t5/stm32-mpus-products-and-hardware/failing-eth2-on-stm32mp2/m-p/849378

Regards.

In order to give better visibility on the answered topics, please click on 'Best Answer' on the reply which solved your issue or answered your question.Tip of the day: Try Sidekick STM32 AI agent
OKN
OKNAuthorBest answer
Associate III
August 22, 2026

Hello  @PatrickF  

We are using the ADIN1300 for the PHY.
The PHY clock is generated by a 25 MHz crystal.
I added st,ext-phyclk to the eth1 configuration in the device tree.
The stm32-dwmac error has been resolved, and end0 is now active.

Thank you very much for your helpful advice.

Best regards,
--
okn