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Hello engineers, I'm using the latest version of CubeMX and creating a project with STM32MP135FAFx, but the highest clock configuration I can select is 650MHz. According to the datasheet, the maximum supported clock is 1GHz. Someone else has raised the same issue before 👉🏻https://community.st.com/t5/stm32-mpus-products-and-hardware/stm32mp135f-clock-config/m-p/720882#M11932. My CubeMX version is 6.16.0.This is my screenshot:This is a screenshot I saw online of someone else configuring their computer to 1GHz, and I'm quite certain that someone else has configured their computer to 1GHz like this before.Could the engineers please help me determine if the problem lies with my usage or with CubeMX itself?Thank you!
Hi everyone,I’m trying to connect a MIPI CSI camera to my STM32MP257F-DK board. I’m using Yocto (branch scarthgap) with core-image-minimal and created a custom Yocto layer to patch the device tree located at arch/arm64/boot/dts/st/stm32mp257f-dk.dts.The camera I’m working with uses the I²C address 0x3c, which unfortunately is also used by the ADV7535 HDMI chip on the STM32MP257F-DK board. As shown below (from the stm32mp257f-dk.dts file and i2cdetect), the ADV7535 occupies multiple addresses on I²C2:adv7535: hdmi@3d { compatible = "adi,adv7535"; reg = <0x3d>, <0x3c>, <0x3f>, <0x38>; reg-names = "main", "cec", "edid", "packet"; ... }; 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- 38 -- -- -- 3c 3d -- 3f 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ...My main question is: how can I connect my camera when
Spoiler (Highlight to read) Hi,I created a TouchGFX project for the STM32MP135F-DK board. When compiling the project, the error listed below appeared. Despite the error, I was able to load and debug the application on the board using the same procedure applied to any example running on DDR memory.I verified that "the application binary file 'STM32MP135F-DK.stm32'" was not generated in the folder: Project Folder>\Binary\apps\STM32MP135F-DK.stm32 as per the link:https://wiki.st.com/stm32mpu/wiki/How_to_install_X-TouchGFX_MPU_AddonI am using a computer running Windows 11, is it necessary to install any additional software to generate this file? make -j12 all arm-none-eabi-size STM32MP135F-DK.elf text data bss dec hex filename530448 785264 134112 1449824 161f60 STM32MP135F-DK.elfFinished building: default.size.stdout ../../Utilities/ImageHeader/postbuild_STM32MP13.sh "C:\ST\STM32CubeIDE_1.18.1\STM32CubeIDE\plugins\com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for
Hello guys!I am trying to configure U-Boot on a stm32mp257f-dk board so that I can use the “ums” command with SuperSpeed. After configuring the device tree, I managed to configure the usb3dr as usb3(as it says in the debug printf written on the terminal after calling the command). After doing this and running the “ums” command, in the console I get an error message saying “Cannot get PHY1 for usb@48300000”. After a little bit of research, I could not find a combophy driver in the U-Boot source code. Fast forward, I managed to do a configuration for the COMBOPHY(porting it from the linux driver), and it does not return any error. The command works now but it falls back silently from SuperSpeed to HighSpeed. My question is, even if the COMBOPHY is configured properly in U-Boot, is the dwc3-generic U-Boot driver capable of configuring the USB3DR peripheral to do the handshake for SuperSpeed?I managed to verify the SuperSpeed in Linux so there isn't any Hardware problem rela
Hi,i need to modify the default debug uart serial in device tree of all the boot components (including u-boot, tf-a, optee etc) in stm32mp257f-ev1. I saw that external-dt_%.bb is fetching git://github.com/STMicroelectronics/dt-stm32mp.git and also EXTERNAL_DT is enabled by default, but i want to use my custom dt for the fial build by default instead of stm32mp257f-ev1.dtb.I want to add my custom dt with the custom name as default dtb used in all the component, im hoping for a solution for this to maintain all my dt at one place and modify. i have too many changes to make and i dont want to patch the stm32mp257f-ev1.dts in the kernel source tree. Hoping for a quick reply, thanks in advance.
I'm trying to debug TF-A BL2 on my stm32mp157f-dk2 kit 1. Memory card is setup. Partition 1&2 is copied with TF-A2. I'm expecting that if I connect a debugger, open a debug session with open OCD and gdb , I would be able to connect to the target3. I would set breakpoint at entry point of BL2 and reset the target by debugger.4. After reset I would be able to halt the CPU at entry point and then I go on with debugging.. Is this approach valid?Or it's not possible to debug TF-A with this method? I tried it and I find problems: 1. I can put breakpoint on bl2_main but it never hits.2. I can't reset and get the connection back by using stm32cubeide 3. Can't access the address 0x2ffcxxxx Can someone shed light on this topic?
hi team,I'm facing issue connecting stm32mp25 gui tool with the STEVAL$USBI2CFTA bridge, the GUi tool says No bridge connected.I still haven't connected the other end of the USBI2C bridge to PMIC stpmic25a.I have installed the required FTDI 260Q drivers, and also the FTDI testing software which detects the usbi2c bridge and im able to send the i2c messages and detect the slave, but the STPMIC25 GUI says no bridge connected.FYR im using windows 11.Hoping for a quick reply for this issue. Thanks in Advance.
hi, I'm trying to debug stm32mp157f-dk2 by using stm32cubeide by using open OCD and gdbAfter connection, I'm constantly getting below error.I can't even single step in or run. "failed to insert all hardware breakpoints; you may have requested too many hardware breakpoints/watchpoints"
I have developed a c application, I have some html pages that are ran through nginx . For now they are exposed , any one gets the board access can see these files and copy the files. My question is How can I secure my files.
I know that USB3DR cannot be used with PCI Express if USB3DR is configured as SuperSpeed.But can USB3DR be used with PCI Express if USB3DR is configured as 2.0 e.g Hi-Speed?
We are pleased to announce that STM32CubeIDE 2.0.0 release is available. STM32CubeIDE is now independent from STM32CubeMX. With this release, device configuration, previously handled within STM32CubeIDE via STM32CubeMX, is now exclusively available through the stand-alone STM32CubeMX tool. Users will configure microcontroller peripherals and generate initialization code separately in STM32CubeMX, then import the generated projects into STM32CubeIDE for coding and debugging. STM32CubeIDE, is now a stand-alone tool, offers the possibility to create empty project through its own MCU/Board selectors now present inside. What does this change mean for developers? Separate download and installation: STM32CubeMX is no more integrated in STM32CubeIDE, requiring separate download alongside STM32CubeIDE 2.0.0 for configuration and code generation. Tool update flexibility: Developers can update and freeze&n
We are pleased to announce that STM32CubeMX 6.16.0 release is available. What is new in 6.16.0: Added support for new microcontrollers across the STM32WBA, STM32N6 and STM32H5 series and the STM32WL3x product line. The related new boards include the NUCLEO-WL3RKB1 and NUCLEO-WL3RKB2. Implemented the "Start from Board" feature for NUCLEO-WL3RKB1 and NUCLEO-WL3RKB2: Preconfigured board setup through the Start From Board feature simplifies project creation and significantly reduces development time. Released a new installer that natively supports Apple® Silicon : Native support of ARM64 for mac computers. Implemented the memory management tool for STM32N6: This feature is designed to assist developers in configuring and optimizing the memory layout of their STM32N6 projects efficiently. Enhanced the build process using CMake: Default configuration: ST ARM CLANG with its own linker instead of GCC linker. Picolib is selected as default library for the b
Hello, I am currently having problems initializing the I2C interfaces on the M33 core of the STM32MP257F-DK Board. The interfaces in question are I2C2 and I2C8, the ones exposed on the 40 pin connector. I have code that toggles LEDs and it works fine when the I2C initialization is commented out but when its not it pauses. I found a community post that seemed like it might have the answer, here is the link for that post: https://community.st.com/t5/escalated-topic/stm32mp257f-persistent-issue-with-i2c8/td-p/854389. But when I click the link I get taken to a page that says the following: Access DeniedYou do not have sufficient privileges for this resource or its parent to perform this action. Click your browser's Back button to continue. Return to my original page
I aim TO drive a mipi display screen on STM32MP257F-EV1, so I have to understand the DRM framework.After flash the new firmware, I found that the modetset always shows errors, so I want to confirm whether the support in this aspect is OK? But watching your previous video, it can drive LVDS screen, so I feel very strange, is there anything else I need to pay attention to? STM32_Programmer_CLI -c port=usb1 -w ./flashlayout_st-image-weston/optee/FlashLayout_sdcard_stm32mp257f-ev1-ca35tdcid-ostl-m33-examples-optee.tsv root@stm32mp2:~# modetest -M stm failed to open device 'stm': No such file or directory as you can see, all are failed. root@stm32mp2:~# modetest trying to open device 'i915'...failed trying to open device 'amdgpu'...failed trying to open device 'radeon'...failed trying to open device 'nouveau'...failed trying to open device 'vmwgfx'...failed trying to open device 'omapdrm'...failed trying to open device 'exynos'...failed trying to open device
We are pleased to announce that STM32CubeProgrammer 2.21 is available What is new in 2.21: • Support for the STM32WL3Rxx microcontrollers: – Internal memory programming – Option byte and OTP programming – PKCS#11 – Firmware authentication • STM32MP21x microprocessors: SSP support on Linux®• STM32WBA6xxG microcontrollers: Support for 1-Mbyte flash memory size• Support for new devices in the STM32C0 series: STM32C011xx, STM32C031xx, STM32C051xx, STM32C071xx, STM32C091xx, and STM32C092xx microcontrollers• Support for the factory reset of option bytes: – STM32WBA5xxx and STM32WBA6xxx microcontrollers – STM32U375/385 microcontrollers• Dynamic upgrade of components• Support for SWD multi-drop• Fast read new CLI command Main fixed issues in 2.21: Refer to the STM32CubeProgrammer wiki at: STM32CubeProgrammer errata 2.
This page mentions that you are supposed to use tar xf for SDK extraction. Unfortunately this doesn't work for the latest SDK 6.6 (scarthgap), it looks like the SDK is just a tar archive and not compressed. $ tar xf en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz tar: This does not look like a tar archivetar: Skipping to next headertar: Exiting with failure status due to previous errors$ tar xzf en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz tar: This does not look like a tar archivetar: Skipping to next headertar: Exiting with failure status due to previous errors$ file en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz: gzip compressed data, from Unix, original size modulo 2^32 934342372 gzip compressed data, unknown method, ASCII, was "", encrypted, from FAT filesystem (MS-DOS, OS/2, NT), original size modulo 2^32 93434237
I am currently using the distribution version:V5、rt 6.1.82-rt patch、stm32mp257Currently, the SPI interface is bound by default power-domains;I don't want the SPI interface to enter sleep mode during idle time, as it may cause Oops issues1.How can I prevent it from entering the regulation of this power domain? Do you want to directly delete power domains in the device tree?2.Once power domains are deleted, will SPI peripherals not enter power consumption adjustment? Or is it in an unknown state?
Hello,I am working on an STM32MP257F platform using the STM32MPU OpenSTLinux Distribution (V25), together with the latest STM32CubeMX code-generation flow for the STM32MP257F-DK board.I am using the STM32MPU-OSTL-DEV-helper to build the full BSP (Kernel + U-Boot + OP-TEE).The Linux DTS and U-Boot DTS build correctly.However, the OP-TEE Device Tree compilation fails with the following error:Error: stm32mp257f-mydts-mx-rif.dtsi:63.116-117 syntax errorFATAL ERROR: Unable to parse input tree To investigate, I inspected the CubeMX-generated OP-TEE RIF file:STM32MPU-OSTL-DEV-helper/DEVICETREE/myDTS/optee/stm32mp257f-mydts-mx-rif.dtsiUsing:nl -ba stm32mp257f-mydts-mx-rif.dtsi | sed -n '60,130p'The file appears syntactically correct. For example:60 RIFPROT(STM32MP25_RIFSC_I2C5_ID, EMPTY_SEMWL, RIF_LOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN) 61 RIFPROT(STM32MP25_RIFSC_I2C6_ID, EMPTY_SEMWL, RIF_LOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN) 62 RI
I need som help about constructing a FlashLayout file for CubeProgrammer. I have a template of a FlashLayout for the STM32MP1 processor. #opt Id Name Type Device Offset Binary - 0x01 fsbl-boot Binary none 0x00000000 tf-a-usb.stm32 - 0x03 fip-boot FIP none 0x00000000 fip.bin P 0x04 fsbl1 Binary mmc0 0x00004400 tf-a-sdcard.stm32 P 0x05 fsbl2 Binary mmc0 0x00044400 tf-a-sdcard.stm32 P 0x06 metadata1 FWU_MDATA mmc0 0x00084400 metadata.bin P 0x07 metadata2 FWU_MDATA mmc0 0x000C4400 metadata.bin P 0x08 fip-a FIP mmc0 0x00104400 fip.bin PED 0x09 fip-b FIP mmc0 0x00504400 none PED 0x09 u-boot-env ENV mmc0 0x00904400 none P 0x10 bootfs System mmc0 0x00984400 bootfs.ext4 P 0x11 vendorfs FileSystem mmc0 0x04984400 vendorfs.ext4 P 0x12 rootfs FileSystem mmc0 0x05984400 rootfs.ext4 P 0x13 userfs FileSystem mmc0 0x33984400 userfs.ext4 I have installed the SDK and Sources inside CubeIDE. I have two questions in this thread:1. If I want to flash my eMMC, which is connected
Hi,I need help to setup the DeviceTree for our custom board using STM32MP135FAE7 and TI TLV320AIC3254.I have read the Wiki about SAI and read and tried to implement SAI using these posts as reference:https://community.st.com/t5/stm32-mpus-products/stm32mp135-pcm5102a-sai1a/td-p/573289https://community.st.com/t5/stm32-mpus-embedded-software/stm32mp135-sai-missing-clock-error-at-boot-time/td-p/55114https://community.st.com/t5/stm32-mpus-products/help-in-creating-a-simple-soundcard-with-i2s-or-sai-if-necessary/td-p/568430/page/2No Luck.And also got confused about where to put the Codec. On the Wiki Page here shows codec under i2c node but on this post there is a comment from @Erwan SZYMANSKI saying that codec should be under root not I2C or I2S. How should I decide where to put it, is it depending on the IC ? What am I missing?and following those comments, I have enabled the configs related to codec in the config file and updated the kernel and they show up.CONFIG_SND_SOC_T
This page is currently empty: How to build and debug boot project on STM32MP25 CortexM33 in STM32CubeIDEHere's how to get to the page:STM32MP2Dev | Product - STMicroelectronicsClick on the first Wiki link (9 of 9), then you get to this page:How to build and debug boot project on STM32MP25 CortexM33 in STM32CubeIDE - stm32mpu
Can someone explain how to build own custom yocto linux ?I have experience with raspberry pi, but stm32mp2 have none normal explanation.I have cloned from git scarthgap branch of poky, meta-openembedded, meta-st-stm32mp and meta-st-openlinux. Also, I have downloaded stm32mp SDK.I can't understand if cubemx project for the board is needed ?if needed how to add it if I have generated it ? I have many years of embedded programming of stm32I can't find any build machine for bitbake for stm32mp257f-ev1 ?Overall, trying to build default machine="stm32mp2" gives plenty errors, which I cannot understand.Maybe someone can provide very direct explanation for building image ?
In accordance with the booting procedure for STM32MP2 https://wiki.st.com/stm32mpu/wiki/STM32MP2_backup_registers#Boot_mode_selection_feature ROM analyzes the BOOT_MODE register and decides to switch to serial boot mode: "The ROM code executes a serial boot if BOOT_MODE[7:0] is equal to 0xFF". It is TAMP_BKP96R (0x46010280) for STM32MP2xx processors. And if I write 0xff there and do a reset, then the processor will reset and go into USB boot mode. In Linux, there is a command for this: reboot romcode_serial.This mode and this command worked perfectly in STM32MP1xx processors but does not work at all in STM32MP2xx.Moreover, I even tried writing directly to this register in U-boot mode and doing a reset - the result is the same, this mode does not work. Is there any special feature in this mode for STM32MP2XX series processors or is this a ROM code issue?
My design is based off STM32MP257F-EV1. In which a RTL8211F-CG Ethernet Transceiver is used. My question is on Pin 39 (RSET) of the transceiver. A 2K49 resistor is used. Where does this value come from? Is it a recommendation from Realtek supplier?
Description:When configuring DDR parameters for STM32MP257 in STM32CubeMX, I changed the DDR speed bin:Speed_Bin: DDR4-3200AA 22-22-22 → DDR4-2933Y 21-21-21After generating the code:The device tree were updated correctly according to the new timing values.However, the generated Device Tree files (.dts/.dtsi) did not change at all.This is confusing. The DTS still reflects the previous configuration even though the DDRCTRL/DDRPHY timings have been modified. Questions to ST:Is this a known limitation of STM32CubeMX (i.e., CubeMX does not update DTS when DDR timing changes)?Should the Device Tree be updated automatically when the DDR Speed_Bin is changed?The current behavior looks like a potential bug or an unimplemented feature in CubeMX, as it may lead users to believe DDR configuration did not take effect.Thank you.
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