WL55CC: OB IPCCDBA/pMb_RefTable mismatch even after stlink programming

[bblouin]

Programmed OB IPCCDBA to 0x800Value of OB struct.ipcc data buffer:

Name : OptionsBytesStruct.IPCCdataBufAddr

Details:536903680

Default:536903680

Decimal:536903680

Hex:0x20008000

Binary:100000000000001000000000000000

Octal:04000100000

Value of pMb_RefTable:

Name : pMb_RefTable

Details:0x200000e4 <MBSYS_RefTable>

Default:0x200000e4 <MBSYS_RefTable>

Decimal:536871140

Hex:0x200000e4

Binary:100000000000000000000011100100

Octal:04000000344

Values flashing OB IPCC to 0xe4

Name : OptionsBytesStruct.IPCCdataBufAddr

Details:536874560

Default:536874560

Decimal:536874560

Hex:0x20000e40

Binary:100000000000000000111001000000

Octal:04000007100

Name : pMb_RefTable

Details:0x200000e4 <MBSYS_RefTable>

Default:0x200000e4 <MBSYS_RefTable>

Decimal:536871140

Hex:0x200000e4

Binary:100000000000000000000011100100

Octal:04000000344

How do I correct this shift? I've tried many ways and it still doesn't work.

[YBOUV.1]

Hi,

can you please describe your Setup e.g HW(Board and WL chip) /FW/IDE

it seems that the MBSYS_RefTable is not placed properly. It must be at 0x20008000.

If you have generated your project from scratch from cubeMx, the scatter file (.ld) may not be the correct one.

Can you check your .ld file and compare it with

https://github.com/STMicroelectronics/STM32CubeWL/blob/main/Projects/NUCLEO-WL55JC/Applications/LoRaWAN/LoRaWAN_End_Node_DualCore/STM32CubeIDE/CM4/STM32WL55JCIX_FLASH.ld

Also please check the M0+ side,

For you information, Cube1.1.0 will be available within few days and will have some improvement regarding the OB loading (done in the FW automatically)

[bblouin]

WL55CCU7 - custom board - FW v1.1.0 - STM32CubeIDE Version: 1.7.0 Build: 10852_20210715_0634 (UTC)

//CM0
 
/*
******************************************************************************
**
** File : LinkerScript.ld
**
** Author : STM32CubeIDE
**
** Abstract : Linker script for STM32WL55xC Device
** 256Kbytes ROM
** 64Kbytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is without any warranty
** of any kind.
**
*****************************************************************************
** @attention
**
** <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
** All rights reserved.</center></h2>
**
** This software component is licensed by ST under BSD 3-Clause license,
** the "License"; You may not use this file except in compliance with the
** License. You may obtain a copy of the License at:
** opensource.org/licenses/BSD-3-Clause
**
*****************************************************************************
*/
 
/* Entry Point */
ENTRY(Reset_Handler)
 
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
_Min_Heap_Size = 0x400 ; /* required amount of heap */
_Min_Stack_Size = 0x1000 ; /* required amount of stack */
 
/* Memories definition */
MEMORY
{
 RAM (xrw) : ORIGIN = 0x2000A000, LENGTH = 24K
 ROM (rx) : ORIGIN = 0x08020000, LENGTH = 128K
 RAM_SHARED (xrw): ORIGIN = 0x20009000, LENGTH = 4K
}
 
/* Sections */
SECTIONS
{
 /* The startup code into "ROM" Rom type memory */
 .isr_vector :
 {
 . = ALIGN(8);
 KEEP(*(.isr_vector)) /* Startup code */
 . = ALIGN(8);
 } >ROM
 
 /* The program code and other data into "ROM" Rom type memory */
 .text :
 {
 . = ALIGN(8);
 *(.text) /* .text sections (code) */
 *(.text*) /* .text* sections (code) */
 *(.glue_7) /* glue arm to thumb code */
 *(.glue_7t) /* glue thumb to arm code */
 *(.eh_frame)
 
 KEEP (*(.init))
 KEEP (*(.fini))
 
 . = ALIGN(8);
 _etext = .; /* define a global symbols at end of code */
 } >ROM
 
 /* Constant data into "ROM" Rom type memory */
 .rodata :
 {
 . = ALIGN(8);
 *(.rodata) /* .rodata sections (constants, strings, etc.) */
 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
 . = ALIGN(8);
 } >ROM
 
 .ARM.extab : { 
 . = ALIGN(8);
 *(.ARM.extab* .gnu.linkonce.armextab.*)
 . = ALIGN(8);
 } >ROM
 
 .ARM : {
 . = ALIGN(8);
 __exidx_start = .;
 *(.ARM.exidx*)
 __exidx_end = .;
 . = ALIGN(8);
 } >ROM
 
 .preinit_array :
 {
 . = ALIGN(8);
 PROVIDE_HIDDEN (__preinit_array_start = .);
 KEEP (*(.preinit_array*))
 PROVIDE_HIDDEN (__preinit_array_end = .);
 . = ALIGN(8);
 } >ROM
 
 .init_array :
 {
 . = ALIGN(8);
 PROVIDE_HIDDEN (__init_array_start = .);
 KEEP (*(SORT(.init_array.*)))
 KEEP (*(.init_array*))
 PROVIDE_HIDDEN (__init_array_end = .);
 . = ALIGN(8);
 } >ROM
 
 .fini_array :
 {
 . = ALIGN(8);
 PROVIDE_HIDDEN (__fini_array_start = .);
 KEEP (*(SORT(.fini_array.*)))
 KEEP (*(.fini_array*))
 PROVIDE_HIDDEN (__fini_array_end = .);
 . = ALIGN(8);
 } >ROM
 
 /* Used by the startup to initialize data */
 _sidata = LOADADDR(.data);
 
 /* Initialized data sections into "RAM" Ram type memory */
 .data : 
 {
 . = ALIGN(8);
 _sdata = .; /* create a global symbol at data start */
 *(.data) /* .data sections */
 *(.data*) /* .data* sections */
 
 . = ALIGN(8);
 _edata = .; /* define a global symbol at data end */
 
 } >RAM AT> ROM
 
 _siMB_MEM2 = LOADADDR(.MB_MEM2);
 
 .MB_MEM2 : 
 {
 . = ALIGN(8);
 
 _sMB_MEM2 = .;
 *(MB_MEM2) ;
 
 . = ALIGN(8);
 _eMB_MEM2 = . ;
 } >RAM_SHARED AT> ROM
 
 /* Uninitialized data section into "RAM" Ram type memory */
 . = ALIGN(8);
 .bss :
 {
 /* This is used by the startup in order to initialize the .bss section */
 _sbss = .; /* define a global symbol at bss start */
 __bss_start__ = _sbss;
 *(.bss)
 *(.bss*)
 *(COMMON)
 
 . = ALIGN(8);
 _ebss = .; /* define a global symbol at bss end */
 __bss_end__ = _ebss;
 } >RAM
 
 /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
 ._user_heap_stack :
 {
 . = ALIGN(8);
 PROVIDE ( end = . );
 PROVIDE ( _end = . );
 . = . + _Min_Heap_Size;
 . = . + _Min_Stack_Size;
 . = ALIGN(8);
 } >RAM
 
 /* Remove information from the compiler libraries */
 /DISCARD/ :
 {
 libc.a ( * )
 libm.a ( * )
 libgcc.a ( * )
 }
 
 .ARM.attributes 0 : { *(.ARM.attributes) }
}

[bblouin]

WL55CCU7 - custom board

I will try new firmware and get back.

[bblouin]

FW update didn't solve problem; I forced the shared memory to be equal to OB IPCCDBA byte the code breaks further down.

/* */
	/*_siMB_MEM2 = Return the absolute load address of the named section of */
	/*				.MB_MEM2 = 
					start address for the initialization values of the .MB_MEM2 section.
					defined in linker script
	*/
 . = ALIGN(0x02008000); /* Force alignment to IPCCDBA option byte */
 _siMB_MEM2 = LOADADDR(.MB_MEM2);
 
 .MB_MEM2 : 
 {
 . = ALIGN(4);
 
 /* start address for the .MB_MEM2 section. defined in linker script */
 _sMB_MEM2 = . ;
 *(MB_MEM2) ;
 
 . = ALIGN(4);
 
 /* end address for the .MB_MEM2 section. defined in linker script */
 _eMB_MEM2 = . ;
 } >RAM_SHARED AT> ROM

I can give where it breaks in another post.

[bblouin]

Solved

CM4 linker didn't have ref to shared region

[IREMI.1]

In “Subghz examples�? the CM4 linker file places MbMux_ComTable at 0x20008000

CM0PLUS retrieves the MbMux_ComTable address (placed by CM4) as follow:

OptionsBytesStruct.IPCCdataBufAddr = SRAM1_BASE + IPCCDBA <<4;

By default on STM32WL devices the option byte IPCCDBA is 0x800

So OptionsBytesStruct.IPCCdataBufAddr = 0x20008000 matches the Cm4 linker file 

What’s happen if the linker file places the MbMux_ComTable somewhere else?

During initialisation CM4 reads the IPCCDBA value and compare it with the MbMux_ComTable address from linker file. If the values are not compatible, CM4 overwrites the IPCCDBA option byte and it reboots the board. On next run value will be matching, and CM0PLUS will retrieve the new address.

When generating code with CubeMX starting from scratch, it will use the CMSIS scatter files (linker file) instead of the one provided by Intopack applications

CMSIS default scatter (linker) file does not define MAPPING_TABLE, the MAPPING TABLE will be placed somewhere in SRAM1. 

This means there will be a mismatch between IPCCDBA and MbMux_ComTable, the program overwrites the IPCCDBA Option Byte with "SRAM1" value.

Intopack applications instead provides the MAPPING_TABLE in SRAM2 which has retention properties and can work also in LowPower StandBy mode. So it is strongly suggest to use scatter (linker) file from Intopack applications.

In version v1.0.0 code there was a protection to avoid CM4 to overwrites the IPCCDBA option byte. 

The user had to modify manually the CM4/mbmuxif_sys.c in order to allow overwriting the IPCCDBA.

In the v1.1.0 the protection is removed, only a warning is displayed via the terminal logs.

If user does not pay attention IPCCDBA will be overwritten and MAPPING_TABLE placed somewhere in SRAM1 (no retention property) which is a problem for LowPower StandBy mode.