Question
Why does BLE Data Transmission block Arm® Cortex®�?M4?
STM32WB controllers are dual-core processers where Arm® Cortex®�?M4 core running at 64 MHz for application and Arm Cortex�?M0+ core at 32 MHz for network or BLE.
To transmit data through BLE aci_gatt_update_char_value() Function used which blocks Arm® Cortex®�?M4 core.
Why does the BLE Transmission function block Arm® Cortex®�?M4?
Is there an approach or method to transmit data via BLE without blocking the Arm® Cortex® M4?