What limits the values in SHCI_C2_Ble_Init_Cmd_Param_t when calling SHCI_C2_BLE_Init() for different processors?
Trying to port code written for WB55 or WB50 onto a WB15. Obviously there's less memory available, but apparently zero documentation on what this means in the Real World. I've managed to squeeze a version of my basic application into the WB15 by making the following changes in app_conf.h:
- CFG_BLE_NUM_GATT_ATTRIBUTES 68 -> 48
- CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) -> (500)
Why does this work? Is there something I can do elsewhere to give CPU2 more memory to play with? Using IAR EWARM, looking at the link map there's plenty of spare space in SRAM2, though I have had to allocate CSTACK and HEAP in SRAM2.
Any help appreciated...
