What does RCC_BDCR_RTCEN do on an STM32WL55?

[skoe]

We are using an STM32WL55 (NUCLEO-WL55JC2) and don't understand RCC_BDCR_RTCEN. Our system is configured to be woken up from Stop 1 Mode via RTC wake-up, clocked by LSE. This works, but we wonder about a detail.

According to RM0453, RCC_BDCR_RTCEN is "RTC kernel clock enable". In the RTC block diagram, Figure 274, this seems to be rtc_ker_ck, and also named RTCCLK in that document. As this seems to be the main clock for the RTC clock domain, the RTC should not work if this clock is not enabled.

However, if we comment out RCC_BDCR_RTCEN and POR the device, the RTC wakeup works like... a clockwork. As our software does not use any 3rd party code it was easy to check that nobody touches this bit. How can it work without it? What else does that bit do?

[waclawek.jan]

Read out and check content of RCC_BDCR.

It's in backup domain, i.e. it's not reset by system reset only by backup-domain reset.

JW

[skoe]

Thanks for the response, @Community member​. It is indeed not set, it says RCC.BDCR: 0x00000103, but the LED we put there as an indicator blinks exactly at the right speed and there's no other wake-up source that could do this.

We are still wanting to find out what it means, because we have the ambition to understand the system to down to every bit.

[waclawek.jan]

Interesting.

I am not familiar with the STM32Wx so maybe there's something I am not aware of.

If you don't put the mcu to stop mode, and observe the RTC_TR register (e.g. from debugger or by reading out its content - beware of the need of reading out RTC_DR too) - does it change, while RCC_BDCR.RTCEN is still 0?

What I'm aiming at is, whether the "going to stop" process is responsible for enabling the RTC clock. Also, is the Cortex-M0+ running? Can't be that one which enables the RTC clock?

JW

[skoe]

Indeed interesting. And thank you for thinking about this, @Community member​ !

I put a small loop into the code which prints the following over UART (the timestamps are from minicom):

[2022-12-15 12:04:00.207] RCC_BDCR: 0x00000103
...
[2022-12-15 12:04:00.232] RTC_TR DR: 00043543 00002101
[2022-12-15 12:04:00.234] RTC_TR DR: 00043543 00002101
[2022-12-15 12:04:00.237] RTC_TR DR: 00043544 00002101
[2022-12-15 12:04:00.239] RTC_TR DR: 00043544 00002101
...
[2022-12-15 12:04:00.460] RCC_BDCR: 0x00000103

No, the M0+ is not running. Looks like RCC_BDCR_RTCEN does something different than we think or it's broken :\

Any ideas?

[waclawek.jan]

As I've said, I have no experience with the STM32Wx, I don't even have one to try.

I've tried on an STM32F4 and RCC_BDCR_RTCEN stops/enables RTC "ticking" as expected.

At this point, you may want to contact ST directly, through FAE or the web support form.

JW