Using SRAM2 for CPU1 when CPU2 is not needed at all
Hello,
we are currently evaluating whether the STM32WB10 is suitable for a new project. Even though the project will not use wireless connectivity, the STM32WB10 is interesting to us because it is used in high volume in another project and is therefore reasonably priced. According to the data sheet, it comes with 48KB RAM and 320KB flash.
Since we will not be using CPU2, SRAM2 will not be used by it. SRAM1 alone is not enough for our application, so we need to have access to at least SRAM2a (36KB) to get our application running.
After studying the documentation it seemed to be possible to make SRAM2a and SRAM2b available to CPU1 via the option bytes (RM0478 chapter 3.10.18 and 3.10.19).
After trying this out with Nucleo-WB15CC it shows this is not the case at all. I tried configuring FSD, BRSD_A, SBRSA_A, BRSD_B and SBRSA_B, but this did not yield any success.
When writing with STM32CubeProgrammer, errors like the following showed up in the log:
"Error: Expected value for Option Byte "BRSD_B": 0x1, found: 0x0"
"Error: Option Byte Programming failed"
When writing with J-Link Commander v7.84c, after unlocking the flash and writing to the key register for the option bytes, everything seems fine, no errors occur. This perceived success lasts only until the latest value in memory is read back, which corresponds to the value before the write.
After more hours of reading the docs it seemed like those settings are made automatically when uploading a wireless stack and can not be adjusted manually by the user. (https://www.st.com/resource/en/product_training/STM32WB-Security-Memories-Protections.pdf)
Is there anything I am missing out? Did anybody ever try to use a STM32WB chip without wireless connectivity and then reallocate the CPU2 resources? Is this even possible?
It would be nice to hear that this is working, although it doesn't look like it to me right now.
