Trouble with the STM32CubeWL Dual Core example projects

Forum|Forum|5 years ago
January 20, 2021
23 replies
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I've just gotten a Nucleo-WL55JC1 and am having a bit of trouble getting the dual core example applications working out of the box. The single core AT_Slave and End_Node examples do however compile, program and run on the M4 core with no issue. We are able to set up the node and get it joined to our lrwan network.

I am using the CubeIDE toolchain. This is my first go at working with a dual core STM32 so it's quite possible I'm just missing something fundamental.

The first issue seems to be in the program size for the M0+. With the default project configuration, the binary for this core ends up taking overflowing its 128k allocated ROM by 7360bytes. I am able to correct for this by either turning on any degree of compiler optimization, or by adjusting the ROM regions defined in the linker script for the M4 and M0+ cores to give the M0+ more space.

After implementing either of the above changes to allow the build to complete, I set up a debug configuration flash both images and attach the debugger in the M4's context.

The binaries both seem to download successfully, however running the program returns the following error over the device's UART:

WARNING: There is a difference between the MAPPING_TABLE placement in memory: 0x20008000

and the address calculated according to the IPCCDBA option byte: 0x2003FFF0

The execution enters now in a while(1){}

please check the CM4\MbMux\mbmuxif_sys.c or update the scatter file

Going through UM2643 and AN5406 I haven't come across anything obvious I might have missed - any suggestions or insights would be welcome.

Thanks!

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mromani2

Associate

I have been able to make it work replacing files and changing optimisation flags.

I still have problems debugging but I will open another issue if necessary.

Thanks for your help.

Miguel

OSTEP.1

Visitor II

Hi,

I have the same issue :

WARNING: There is a difference between the MAPPING_TABLE placement in memory: 0x20008000
 and the address calculated according to the IPCCDBA option byte: 0x2003FFF0
 The execution enters now in a while(1){}
 please check the CM4\MbMux\mbmuxif_sys.c or update the scatter file

I tried Aurelian's solution "by going into sys_conf.h on both M0+ and M4 projects and changing LOW_POWER_DISABLE to 1" but it didn't fix it.

@YBOUV.1 Do you have any idea how to solve this issue ?

YBOUV.1

ST Employee

Hello,

For your info, this issue was resolve in https://community.st.com/s/question/0D73W000000W0iv/detail?s1oid=00Db0000000YtG6&s1nid=0DB0X000000DYbd&emkind=chatterCommentNotification&emvtk=WQSlx9RbS.WX4amZMSYIWDVX6a1d0Pou.2dkRalTl4s%3D&s1uid=0053W000001iIzj&emtm=1611692464197&fromEmail=1&s1ext=0

The option byte IPCCDBA probably does not match MAPPING_TABLE address in the linker file at STM32CubeIDE\CM4\STM32WL55JCIX_FLASH.ld.

MAPPING_TABLE is mapped at RAM_SHARED (@0x20008000). Mapping table is used to exchange data between the cores.
To see IPCCDBA, connect with cube programmer, open tab 'OB', section 'User Configuration', scrolling down to bottom you will find it.

following rule shall apply IPCCDBA = (MAPPING_TABLE>>4)

please try to program manually option byte IPCCDBA to 0x800. The board will restart to reload the new OB value.

This will be automatically done by the FW in next release,

OSTEP.1

Visitor II

Even after modifying manually the IPCCDBA in stm32cubeprogrammer, I have the same issue in cubeide.