STM32WB5MMG module LSE sporadic failure. consistent failure in case supplied VDD <=3.20V

[vishalkeshavamurthy]

We are using the STM32WB55MMG SIP module for a simple BLE application and came across the following behavior.

• The application is configured to use LSE as the clock source for RTC with medium drive capability as recommended by the data sheet. 
• The LSE fails to start sporadically sometimes, due to which RTC related functions fail, due to timeout of function LL_RCC_LSE_IsReady. The issue can be replicated consistently if a drained battery with closed voltage measured at VDD is <3.2V.
• The BOR voltage value is set to reset level threshold of 1.7V 
• The LSE startup failure was confirmed by probing LSE signal trough MCO pin. When LSE starts it is measured at ~32.76KHZ.  

Since the module comes packaged with LSE crystal and associated passives, we believe that the hardware design is proven 

• Could anyone please provide some insight as to how we can resolve the issue, either by HW or FW?
• Also, is there anything that can be done in FW to recover from a failed LSE start  
• Also attached below is a SFR dump comparison in cases where LSE has started/not started. 

 

[STOne-32]

Dear @vishalkeshavamurthy ,

Only for testing and debug purposes , can you change the drive level to the highest mode or lower by Firmware change and after Completely remove the battery and power on again to see if behavior still the same with the bad module ? 

STM32WB55_CM4/RCC/BDCR/LSEDRV:0x2

and let us know .

 Hope it helps ,

STOne-32

[vishalkeshavamurthy]

@STOne-32 ,

Thank you for the response 

I had tried changing the drive strength, as well as the LSE startup timeout to 10s from the default 5s. Neither of these changes made a difference. 

I was able to circumvent the issue however by disabling the clock security LSECSS for the LSE. I still have not found a satisfactory explanation for this behavior though