STM32WB55 SRAM2 retention

[OliM]

Using the suggestions from https://community.st.com/t5/stm32-mcus-wireless/stm32wb-sram2a-what-is-the-size-that-can-be-used-without/m-p/176847
I can now address the remaining non secure SRAM2A as BKUP_RAM. During runtime this seems to work just fine, but after Standby the RAM is still cleared, even though RRS in PWR->CR3 is and remains set. Is this a "feature" of the wireless stack or am I doing something else wrong?

As you can see in the screenshot, I stopped the operation on SystemInit. This is called before any loading of RAM data, so my canaries (expected are 0x55 at the beginning and 0xAA at the end of the test array) should even still be alive if NOLOAD didn't work for some reason, but instead I have clean zeros(! no random data) throughout the array.

 

 

[OliM]

So I checked my option bytes for the nth time and finally realized that SRAM2RST has inverse logic. So enabling that bit leads to disabling the SRAM2 reset, and I finally keep my data.