LoRa B-L072Z-LRWAN1 AT-slave firmware on USART1 in stead of LPUART

[GVanb]

Hello

For an IoT project I am using the CMWX1ZZABZ-078 LoRa transceiver module, which is used in the B-L072Z-LRWAN1 evaluation board. I want to use the LoRa module as an AT command slave. So that I can use an other MCU as master. They are communicating with eachoter via UART. The AT-slave firmware can I download from the website from ST, I-CUBE-LRWAN. This contains an example of such an AT slave firmware. Now my problem is that on the evaluation board the LoRa module communicates with the STLink MCU via LPUART1. The Tx pin is on PA3 and the Rx pin is on PA2. For my project I want to use the USART1 which is located on pins PA9 (Tx) and PA10 (Rx).

So first I changed the UART hardware definitions so that I initialize USART1 in stead of LPUART1. However, when I test this I can only send some data, but I get no feedback. Maybe its because of the DMA?

The thing is that I am not sure that my device works correct, because I get no feedback from the LoRa module.

Maybe somebody knows what I am doing wrong?

Thanks!

Gilles

[RKaly.1]

Hi

Just in case you haven't been able to solve it ,

/* Definition for UARTx clock resources */

#define USARTx              /*LPUART1*/USART1

#define USARTx_CLK_ENABLE()       /*__LPUART1_CLK_ENABLE();*/__USART1_CLK_ENABLE();

#define USARTx_RX_GPIO_CLK_ENABLE()   __GPIOA_CLK_ENABLE()

#define USARTx_TX_GPIO_CLK_ENABLE()   __GPIOA_CLK_ENABLE()

#define DMAx_CLK_ENABLE()        __HAL_RCC_DMA1_CLK_ENABLE()

#define USARTx_FORCE_RESET()       /*__LPUART1_FORCE_RESET()*/__USART1_FORCE_RESET()

#define USARTx_RELEASE_RESET()      /*__LPUART1_RELEASE_RESET()*/__USART1_RELEASE_RESET()

#define USARTx_TX_PIN          /*GPIO_PIN_2*/GPIO_PIN_9

#define USARTx_TX_GPIO_PORT       GPIOA

#define USARTx_TX_AF           /*GPIO_AF6_LPUART1*/GPIO_AF4_USART1

#define USARTx_RX_PIN          /*GPIO_PIN_3*/GPIO_PIN_10

#define USARTx_RX_GPIO_PORT       GPIOA

#define USARTx_RX_AF           /*GPIO_AF6_LPUART1*//*GPIO_AF5_USART1*/GPIO_AF4_USART1

/* Definition for USARTx's NVIC */

#define USARTx_IRQn           /*RNG_LPUART1_IRQn*/USART1_IRQn

#define USARTx_IRQHandler        /*RNG_LPUART1_IRQHandler*/USART1_IRQHandler

/* Definition for USARTx's DMA */

#define USARTx_TX_DMA_CHANNEL       /*DMA1_Channel7*/DMA1_Channel4

/* Definition for USARTx's DMA Request */

#define USARTx_TX_DMA_REQUEST       /*DMA_REQUEST_5*/DMA_REQUEST_3

/* Definition for USARTx's NVIC */

#define USARTx_DMA_TX_IRQn        DMA1_Channel4_5_6_7_IRQn/*DMA1_Channel2_3_IRQn*/

#define USARTx_DMA_TX_IRQHandler     DMA1_Channel4_5_6_7_IRQHandler

#define USARTx_Priority 1

#define USARTx_DMA_Priority 1