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Best answer by TDK

Literally all of the pins on that chip are used. Something needs to go there, where else would you put it? A lot of the other potential pins are peripheral-specific and would suffer the same drawback. Probably not a specific choice but rather an artifact of what pins were left over after everything else was routed.

0693W00000Hoi7QQAR.png

3 replies

TDK
TDKBest answer
December 15, 2021

Literally all of the pins on that chip are used. Something needs to go there, where else would you put it? A lot of the other potential pins are peripheral-specific and would suffer the same drawback. Probably not a specific choice but rather an artifact of what pins were left over after everything else was routed.

0693W00000Hoi7QQAR.png

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Andrew Neil
Super User
December 15, 2021

Ah yes, that's true for the B-L072-LRWAN1 (which, of course, is what I asked).

However, Murata have it in their "reference circuit" - where the majority of connections are uncommitted:

0693W00000HoiQ6QAJ.png 

but maybe their reasoning was the same?

A complex system that works is invariably found to have evolved from a simple system that worked.A complex system designed from scratch never works and cannot be patched up to make it work.
TDK
December 15, 2021

Hmm, it could be. Or perhaps they just copied what ST did without thinking? Or maybe to have it be driven from a voltage other than VDD? Can't think of any other reason to have it like that.

FWIW, I doubt VDD_USB simply being present increases current consumption by a measureable amount, although I have no evidence to back that up.

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waclawek.jan
Super User
December 15, 2021

IMO VDD_USB in itself has negligible static consumption (sub-sub-uA), whether used for USB or not. After all, it's just a bunch of level shifters, which in turn are only a few relatively small MOSFETs loaded directly by gates of the output MOSFETs.

JW

waclawek.jan
Super User
December 15, 2021

Also, as VDD_USB current is shared only by two pins, their individual loading is relatively well defined and independent on load on other pins.

See Current characteristics table in DS, Total output current sunk by sum of all IOs and control pins except PA11 and PA12 versus Total output current sunk by PA11 and PA12.

JW