Any registers to show receive signal "quality"

[David_]

For STM32WLE5JCI6TR, is there register on LoRa receiver node to show quality of received signal in

1. Slow (for time frame of packet) frequency difference between transmitter and receiver TCXO.

2. Fast frequency difference jitter that are at, says, symbol rate.  That is, frequency go up and down quickly during packet time

3. Signal degradation due to transmission path.  For tradation mode, non RoLa, this is the eye diagram that show how much margin the receiver can decode the signal, decision point. This shows signal arriving a bit early or late, due to multiple transmission paths over the air.

4. The chip is DSP inside, right?  There are quite many signal registers for other chips.

5. What is the part number of SemTech chip that is inside the STM chip?

Yes, rssi and snr are on several registers.

Best regards

[Tesla DeLorean]

Something that's a functional equivalent to the SX1262 integrated on the same IC, with an internally wired SPI connection.

Data integrity of what's coming over the air, perhaps look at the CRC, or the patterns actually received, and how those relate to the encode/decode patterns.

Inspection you're perhaps going to need an SDR