STM32H750 using LTDC as VGA output

[Slina]

My reading reference manual it seemed possible at first. I've set back/front porches and sync values in IDE, but it seems I can't anywhere set refresh rate/pixel time. Does this mean that it can't be done?

[Tesla DeLorean]

You should definitely be able to set a pixel clock, and that along with the screen geometry (horizontal and vertical totals) dictate the refresh rate.

​

The LCD CLOCK should come off one of the PLLs as I recall, and gets divided down from there.​

[Slina]

Yes, I was looking for that clock but couldn't find it. ​Since VGA clocks have 0.5%tolerance, I was thinking about using an external CMOS. Still, can't find any LTDC clock settings in Cube IDE. Where is it?

[Tesla DeLorean]

I don't use CubeWTF you'll need to read the instructions on the tin, or peck randomly. The Reference Manual should block diagram the LTDC and clock trees.

STM32Cube_FW_H7_V1.7.0\Projects\STM32H750B-DK\Examples\LTDC\LTDC_Display_2Layers\Src\main.c

/**
 * @brief LCD Configuration.
 * @note This function Configure tha LTDC peripheral :
 * 1) Configure the Pixel Clock for the LCD
 * 2) Configure the LTDC Timing and Polarity
 * 3) Configure the LTDC Layer 1 :
 * - indirect color (L8) as pixel format
 * - The frame buffer is located at FLASH memory
 * - The Layer size configuration : 320x240
 * 4) Configure the LTDC Layer 2 :
 * - The frame buffer is located at FLASH memory
 * - The Layer size configuration : 320x240
 * 5) Load 256 colors in CLUT address for Layer 1
 * @retval
 * None
 */
static void LCD_Config(void)
{
 RCC_PeriphCLKInitTypeDef periph_clk_init_struct;
 
 LTDC_LayerCfgTypeDef pLayerCfg;
 LTDC_LayerCfgTypeDef pLayerCfg1;
 
/* LTDC Initialization -------------------------------------------------------*/
 
 /*## LTDC Clock Configuration ###########################################*/
 /* RK043FN48H LCD clock configuration */
 /* LCD clock configuration */
 /* PLL3_VCO Input = HSE_VALUE/PLL3M = 5 Mhz */
 /* PLL3_VCO Output = PLL3_VCO Input * PLL3N = 800 Mhz */
 /* PLLLCDCLK = PLL3_VCO Output/PLL3R = 800/83 = 9.63 Mhz */
 /* LTDC clock frequency = PLLLCDCLK = 9.63 Mhz */
 periph_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
 periph_clk_init_struct.PLL3.PLL3M = 5;
 periph_clk_init_struct.PLL3.PLL3N = 160;
 periph_clk_init_struct.PLL3.PLL3FRACN = 0;
 periph_clk_init_struct.PLL3.PLL3P = 2;
 periph_clk_init_struct.PLL3.PLL3Q = 2;
 periph_clk_init_struct.PLL3.PLL3R = 83;
 HAL_RCCEx_PeriphCLKConfig(&periph_clk_init_struct);
 
 /* LTDC Initialization -------------------------------------------------------*/
 /* DeInit */
 HAL_LTDC_DeInit(&LtdcHandle);
 
 /* Polarity configuration */
 /* Initialize the horizontal synchronization polarity as active low */
 LtdcHandle.Init.HSPolarity = LTDC_HSPOLARITY_AL;
 /* Initialize the vertical synchronization polarity as active low */
 LtdcHandle.Init.VSPolarity = LTDC_VSPOLARITY_AL;
 /* Initialize the data enable polarity as active low */
 LtdcHandle.Init.DEPolarity = LTDC_DEPOLARITY_AL;
 /* Initialize the pixel clock polarity as input pixel clock */
 LtdcHandle.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
 /* Timing configuration */
 /* The LCD AMPIRE 640x480 is selected */
 /* Timing configuration */
 LtdcHandle.Init.HorizontalSync = (RK043FN48H_HSYNC - 1);
 LtdcHandle.Init.VerticalSync = (RK043FN48H_VSYNC - 1);
 LtdcHandle.Init.AccumulatedHBP = (RK043FN48H_HSYNC + RK043FN48H_HBP - 1);
 LtdcHandle.Init.AccumulatedVBP = (RK043FN48H_VSYNC + RK043FN48H_VBP - 1);
 LtdcHandle.Init.AccumulatedActiveH = (RK043FN48H_HEIGHT + RK043FN48H_VSYNC + RK043FN48H_VBP - 1);
 LtdcHandle.Init.AccumulatedActiveW = (RK043FN48H_WIDTH + RK043FN48H_HSYNC + RK043FN48H_HBP - 1);
 LtdcHandle.Init.TotalHeigh = (RK043FN48H_HEIGHT + RK043FN48H_VSYNC + RK043FN48H_VBP + RK043FN48H_VFP - 1);
 LtdcHandle.Init.TotalWidth = (RK043FN48H_WIDTH + RK043FN48H_HSYNC + RK043FN48H_HBP + RK043FN48H_HFP - 1);
....