Skip to main content
Associate II
August 8, 2026
Question

LTDC Framebuffer Write Skipping Bytes in External Memory – STM32N657X0H32Q

  • August 8, 2026
  • 1 reply
  • 44 views

 

Hello ST Community,

I am working with the STM32N657X0H32Q and configuring the LTDC with external memory. I am facing an issue with framebuffer writes.

The external memory is connected to XSPI Port 1, and the read and write operations work correctly in Memory-Mapped mode at address 0x90000000. I am able to read from and write to this address without any issues.

However, when I configure the LTDC to use the framebuffer at 0x90000000 with a resolution of 800 × 600, I observe that some bytes are missing or skipped during the framebuffer write operation.

For example, I observe that approximately 1 KB of data is written, followed by around 300 bytes being skipped, and this pattern continues.

Memory Configuration

/* Memories definition */
MEMORY
{
ROM (xrw) : ORIGIN = 0x34180400, LENGTH = 255K
RAM (xrw) : ORIGIN = 0x341C0000, LENGTH = 256K
SCREEN_BUFFER_SRAM (xrw) : ORIGIN = 0x90000000, LENGTH = 20M
}

.screen_buffer (NOLOAD) :
{
. = ALIGN(4);
_screen_buffer_start = .;
KEEP(*(.screen_buffer))
. = ALIGN(4);
_screen_buffer_end = .;
} > SCREEN_BUFFER_SRAM

Framebuffer Declaration

__attribute__((section(".screen_buffer")))
uint16_t screen_buffer[800 * 600 * 2];

Framebuffer writing

 

MX_LTDC_Init();

RIMC_MasterConfig_t RIMC_master = {0};

RIMC_master.MasterCID = RIF_CID_1;
RIMC_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;

HAL_RIF_RIMC_ConfigMasterAttributes(
RIF_MASTER_INDEX_LTDC1,
&RIMC_master
);

HAL_RIF_RISC_SetSlaveSecureAttributes(
RIF_RISC_PERIPH_INDEX_LTDCL1,
RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV
);

for (i = 0; i < BUFF_SIZE; i++)
{
screen_buffer[i] = 0x07E0;
}

Questions

Could someone please help me understand the following:

  1. Why is the LTDC skipping or missing approximately 300 bytes after writing around 1 KB?

  2. Could this issue be related to the LTDC burst size, AXI configuration, external memory configuration, or framebuffer pitch/stride?

  3. Are there any specific LTDC or external memory settings that I should verify when using 0x90000000 as the framebuffer address.

  4. Could this behavior be related to cache, memory attributes, security/privilege attributes, or memory alignment?

The external memory read/write operations work correctly when accessed directly in Memory-Mapped mode. Therefore, I would like to understand what changes when the LTDC becomes the master accessing the same framebuffer.

I have attached the relevant LTDC configuration and external memory/Memory-Mapped configuration for reference.

Any suggestions or guidance on the registers or configurations that I should check would be greatly appreciated.

Thanks in advance for your help.

Best regards,
Siddu M.

1 reply

ST Technical Moderator
August 12, 2026

Hello,

How do you measure the writing/skipping?

The porch pixel values on your LTDC are also clocked on the output, but they do not contain any pixel data, could that be the source of your skip?