How do I apply LTDC parallel sync values to DSI interface

[frackers]

I'm having a real conceptual problem trying to visualise sync pulses going down the high speed DSI interface to a TFT LCD.

This means that I have no idea how to set up the LTDC values for HorizontalSync, VerticalSync, AccumulatedHBP etc etc. The ILI9806E (i.e. external GRAM) display document gives no hints on how the sync info is passed over (if it is at all!) on a DSI link, only on a parallel link where there are of course discrete control lines.

I've got to the point that HAL_DSI_PatternGeneratorStart() puts up a pattern that gradually fades away but even though I'm setting my display buffers correctly using DMA2D, the contents never seem to make it out of LTDC into the DSI world!!

I'm sure I'm missing something obvious but the CubeMX code has everything in a different order to the code in the LCD_DSI video mode examples which is making code reviews tricky.

[Tesla DeLorean]

My knowledge of this isn't too deep. Seem to think the bulk of the LCD config gets done at the display side of the DSI.

The LTDC and DSI on the STM32 side need clocks/timing that match the data rates expected at the display. Most of the tinkering I did was with the DSI/HDMI adapter, and there the ADV7533 was configured with the display parameters and the speeds worked back from there such that the data was delivered at the prescribed pixel clock.

[frackers]

Another signal that I'm confused about appears in the CubeMX Clock Configuration screen as LCD-TFT clock but again I can find no relevance to DSI external GRAM connected displays.

I seem to be at a point where I can write a single screen full of data (for example from the pattern generator) but it never refreshes, it just fades away. Does this ring a bell with anyone as to what I may have missed?