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Associate III
June 23, 2026
Question

H7S7 GPU2D stuck at nema_wait_irq_cl

  • June 23, 2026
  • 3 replies
  • 24 views

I made a custom board with STM32H7S7 , Touchgfx without OS, 2 framebuffers in psram(aps256xxn). At first ,after start

the debugging ,the display is normal,but after a while (random time),display is  freezing. Then I pause the program,I found

it stuck at nema_wait_irq_cl.

 

 

This is my screen:

This is information when stuck:

This project is a test project,the touchgfx code is simply rotate textureMapper1 and move red box on each frame

 

 

3 replies

Associate III
June 24, 2026


Hi 

Maybe check this forum where the same issue is described.

 

I recommand to create a example project in touch gfx designer , open the code and check that the MPU settings are the same and same for linker script.

 

H7S7 is quite prone to issue if memory management isn’t perfect 

ambAuthor
Associate III
June 26, 2026

Hello ​@Hamady 

I disabled all CPU Icache and Dcache,also the MPU.Is that a problem?

Associate III
June 26, 2026

If you disable I and D cache you will destroy the performance of the chip i recommand you to enable it 100%

 

MPU is also very important to manage all memory zone of the H7S7.

 

Re-enable the cache and use MPU config of a created project in touch gfx designer .

 

Also check that DMA2D an 2DGPU interrupt are enabled in cube MX

 

This can also help you with MPU config.

https://support.touchgfx.com/docs/development/scenarios/running-graphics-on-stm32h7r

ambAuthor
Associate III
June 26, 2026

I noticed the GPU2D have error callback fired,So I placed break point in this function:

val in first line is 464 every time,what dose this value means?What kind of error I am facing?

Can I ask some @ST support to help me out?

void HAL_GPU2D_ErrorCallback(GPU2D_HandleTypeDef *hgpu2d)

{

uint32_t val = nema_reg_read(GPU2D_SYS_INTERRUPT); /* clear the ER interrupt */

nema_reg_write(GPU2D_SYS_INTERRUPT, val);

 

/* external GPU2D cache maintenance */

if (val & (1UL << 2))

{

HAL_ICACHE_Disable();

nema_ext_hold_deassert_imm(2);

}

if (val & (1UL << 3))

{

HAL_ICACHE_Enable();

HAL_ICACHE_Invalidate();

nema_ext_hold_deassert_imm(3);

}

 

return;

}