Getting somtimes Hardfault in GuiExec()

[Nickjmas]

I was design a custom board with a MCU STM32F767BI, a LCD with 800x600 pixels and a SDRAM with 64Mb. I'm getting a HardFaultHandler after run some time the aplication and it faults inside the process GUI_Exec() according to the PC register. Analizing the fault details, the PRECISERR bit is set and the BFAR has the address 0x480772a4. This address hits in a "Reserved" region in the memory mapping, between AHB2 and AHB1.

The configuration of the LCD-TFT and SDRAM is according to the specifications of the manufacturer and I suspite the problem could be the MPU/cache configuration. The framebuffer is allocated in the top of the SDRAM and his size is aprox 1Mb (800*600*16bpp)

I'm setup the MPU and the cache with the following regions

• Internal RAM - 0x20000000(512Kb) - Normal Memory non cacheable, Full access (TEX=1, C=0, B=0, S=1, XN=0)
• FMC SDRAM Bank1 - 0xC0000000(256Mb) - Strongly Ordered, No access (TEX=0, C=0, B=0, S=0, XN=1)
• FMC SDRAM Chip 64Mb- 0xC0000000(64Mb) - Normal Memory cacheable WT, Full access (TEX=0, C=1, B=0, S=1, XN=0)
• FMC SDRAM Framebuffer- 0xC0000000(1Mb) - Normal Memory cacheable WT, Full access (TEX=0, C=1, B=0, S=1, XN=0)

Is there wrong in some configuration in the MPU/cache? Can you help to find a workaround to prevent this hardfault?

Thank you for your help!

Best regards!

[Nickjmas]

Hi again,

I found some issues that improve the performance and it seems solve the hardfault (it was runnning during 2 days non-stop and I wasn't get any hardfault). 

The issue I was found was:

At first time, the HCLK was setup to run 216MHz and the FMC SDRAM was setup to generate a CLKSDRAM with HCLK/2 (108MHz). The MCU datasheet is decribed the maximum value of CLKSDRAM and is 100MHz, thus, I was setup the HCLK to run ar 200MHz to have a maximum compatible bandwidth witch the SDRAM.

Best regards!