Skip to main content
CBald
Associate III
May 20, 2020
Solved

DSI lane states reset after STOP2 mode, should remain in ULPS

  • May 20, 2020
  • 1 reply
  • 1343 views

I'm trying to make a simple low power application using the STM32L4R9I-DISCO board where I

  1. draw some stuff to the display,
  2. put the DSI link in ULPM,
  3. go to STOP2 mode,
  4. wakeup using the RTC,
  5. bring the DSI link out of ULPM
  6. repeat

I've gotten to the point where I wakeup from STOP2 and try to bring DSI out of ULPM, but DSI_PSR resets to the default LP-11 stop mode on both lines, which confuses the HAL_DSI_ExitULPM() function. This is not the behavior I expected, as the RM says the DSI is frozen and register content is kept during STOP2.

Interestingly, DSI_PSR is the only register that changes. Everything else stays the same. It's like the PHY just "forgets" what mode the lanes are in.

Code is attached at the bottom, I've tried not disabling the DSI (thought maybe it was resetting) but it doesn't make a difference, DSI_PSR still changes.

This topic has been closed for replies.
Best answer by CBald

The issue actually lied in the RCC setup coming out of STOP2. I was re-enabling the main PLL that drove the SYSCLK but I also needed to enable HSE and PLLSAI2 so that the DSI could properly switch clocks in the HAL_DSI_ExitULPM(&hdsi); function.

The code I added was

SET_BIT(RCC->CR, RCC_CR_HSEON_Msk);
 while(!READ_BIT(RCC->CR, RCC_CR_HSERDY_Msk)){
 
 }
 SET_BIT(RCC->CR, RCC_CR_PLLSAI2ON_Msk);
 while(!READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY_Msk)){
 
 }

to the SYSCLKConfig_STOP() function, and now it all works right :beaming_face_with_smiling_eyes:

1 reply

CBald
CBaldAuthorBest answer
Associate III
May 21, 2020

The issue actually lied in the RCC setup coming out of STOP2. I was re-enabling the main PLL that drove the SYSCLK but I also needed to enable HSE and PLLSAI2 so that the DSI could properly switch clocks in the HAL_DSI_ExitULPM(&hdsi); function.

The code I added was

SET_BIT(RCC->CR, RCC_CR_HSEON_Msk);
 while(!READ_BIT(RCC->CR, RCC_CR_HSERDY_Msk)){
 
 }
 SET_BIT(RCC->CR, RCC_CR_PLLSAI2ON_Msk);
 while(!READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY_Msk)){
 
 }

to the SYSCLKConfig_STOP() function, and now it all works right :beaming_face_with_smiling_eyes: