Data corruption when using D-Cache on STM32F7508-DK

[DRobe.4]

I have an unsophisticated system. RAM/Flash internal to the F750. Running perfectly at 200 MHz, many UARTs and other peripherals, displaying data/status on LCD screen. Compiled with Keil free uVision V5.27.1.0 with no errors and no warnings.

Enabled I/D-Cache. Some data (displayed near bottom of screen, in case it matters) was corrupted. Disabled D-Cache and problem disappears. Re-enable D-Cache problem reappears. I-Cache enable/disable has no effect on the problem. Any suggestion how to avoid the problem? Is there a way of increasing the level of array checking, etc. in case my coding is to blame?

[Tesla DeLorean]

Do you configure the MMU for memory shared with DMA or LTDC?

Do you commit writes to the frame buffer with Clean DCache​ by Address?

[DRobe.4]

I do not use MMU or DMA. I have not heard of "Clean DCache" but I have not see any references to it when I have consulted claimed-working STM32Cube_FW_F7_V1.14.0 examples. I am doing nothing exotic. If the Cube code works, so should mine, since I have taken a conservative approach to building a robust system. Lots of interrupts but no DMA. What do you recommend?

[DRobe.4]

Oops... I should have said that code that I've written do not use DMA, but BSP functions supporting the LTDC probably use DMA.