[X-cube-AI] Does stm32 F/H arm coretex-M7 series hardware has TPU(tensor processing unit) for hardware accelation ?
Hello.
I want to know does stm32 cortex m7 series has TPU (tensor processing unit) for hardware acceleration. I heard that TPU has a systolic array which is a network of processors that are responsible for performing computations and passing the results across the system. It consists of a large number of processing elements(PEs) that are arranged in arrays, as illustrated above. These arrays have a high degree of parallelism and are favourable for parallel computing.
A typical Tensor Processing Unit(TPU) has two systolic arrays of size 128*128, so i think it can reduces cycles/ macc.
But in x-cube-ai documents, it is difficult to provide off-line an accurate number of CPU cycles/MACC. However, rough estimations for a 32-bit floating point C-model is ~6 cycles/MACC for Arm cortex-M7.
I think stm32 cortex m7 is just CPU not hardware accelerator. Is it right?
I want to clear explanation for this issue.
Best regards.
